MAX3748 Maxim, MAX3748 Datasheet - Page 6

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MAX3748

Manufacturer Part Number
MAX3748
Description
Compact 155Mbps to 3.2Gbps Limiting Amplifier
Manufacturer
Maxim
Datasheet

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0
The limiting amplifier consists of an input buffer, a multi-
stage amplifier, offset correction circuitry, an output
buffer, power-detection circuitry, and signal-detect cir-
cuitry (see Functional Diagram).
The input buffer is shown in Figure 3. It provides 50Ω
termination for each input signal IN+ and IN-. The
MAX3748/MAX3748A can be DC- or AC-coupled to a
TIA (TIA output offset degrades receiver performance if
DC-coupled). The CML input buffer is optimized for the
MAX3744 TIA.
The high-bandwidth gain stage provides approximately
53dB of gain.
Compact 155Mbps to 3.2Gbps
Limiting Amplifier
6
1, 4, 12
8, 16
_______________________________________________________________________________________
PIN
EP
10
11
13
14
15
2
3
5
6
7
9
DISABLE
OUTPOL
Exposed
paddle
NAME
OUT+
CAZ2
CAZ1
GND
OUT-
RSSI
LOS
V
IN+
IN-
TH
CC
Detailed Description
Supply Voltage
Noninverted Input Signal, CML
Inverted Input Signal, CML
Loss-of-Signal Threshold Pin. Resistor to ground (R
V
Disable Input, CMOS/TTL. The data outputs are held static when this pin is asserted high. The LOS
function remains active when the outputs are disabled, CMOS. On the MAX3748, this pin does not
include ESD protection. If routed through the DS1858/DS1859 controller IC, no additional ESD protection
is required. On the MAX3748A, this pin has ESD protection.
Noninverted Loss-of-Signal Output. LOS is asserted high when the signal drops below the assert
threshold set by the TH input. The output is open collector (Figure 5). On the MAX3748, this pin does not
include ESD protection. If routed through the DS1858/DS1859 controller IC, no additional ESD protection
is required. On the MAX3748A, this pin has ESD protection.
Supply Ground
Output Polarity Control Input. Connect to GND for an inversion of polarity through the limiting amplifier
and connect to V
Inverted Data Output, CML
Noninverted Data Output, CML
Received-Signal-Strength Indicator. This current output can be used to obtain a ground-referenced
voltage proportional to photodiode current with the MAX3744 by connecting an external resistor between
this pin and GND.
Offset Correction Loop Capacitor Connection. A capacitor connected between this pin and CAZ1
extends the time constant of the offset correction loop. Typical value of C
correction is disabled when the CAZ1 and CAZ2 pins are shorted together.
O ffset C or r ecti on Loop C ap aci tor C onnecti on. A cap aci tor connected b etw een thi s p i n and C AZ 2 extend s
the ti m e constant of the offset cor r ecti on l oop . Typ i cal val ue of C
w hen the C AZ 1 and C AZ 2 p i ns ar e shor ted tog ether .
Connect the exposed paddle to board ground for optimal electrical and thermal performance.
CC
disables the LOS circuitry and reduces power consumption.
CC
Input Buffer
Gain Stage
for normal operation.
Figure 1. Power-Supply Current Measurement
FUNCTION
TH
) sets the LOS threshold. Connecting this pin to
V
CC
MAX3748A
MAX3748/
I
CC
A Z
(SUPPLY CURRENT)
i s 0.1µF. The offset cor r ecti on i s d i sab l ed
50Ω
AZ
is 0.1µF. The offset
50Ω
Pin Description
R
TH
I
OUTPUT CURRENT)
OUT
(CML

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