TEA7063 ST Microelectronics, Inc., TEA7063 Datasheet - Page 8

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TEA7063

Manufacturer Part Number
TEA7063
Description
Speech Circuit With Power Management
Manufacturer
ST Microelectronics, Inc.
Datasheet

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TEA7063
3. RECEIVE CHAIN
3.1 A.G.C. In Receive
As described for the transmission chain, also the
receiving gains Gr, from pins 1 and 2 to pin 20,
have a reduction of 6dB when Iline moves from
ILL to ILS (see also paragr. 4).
3.2 Sidetone Compensation
The circuit is provided with a double anti-sidetone
network to optimize both at long and short lines.
In case double antisidetone network is not re-
quested by the application needs, pins 1 and 2
can be connected to each other and 5 external
passive components can be saved (ZALL and
ZRL).
Before entering pins 1 and 2, the received signal
is areduced by the two attenating networks:
- ZALL/ZRL to pin 1 for long lines sidetone com-
pensation,
- ZALS/ZRS to pin 2 for short lines sidetone com-
pensation.
ZRL and ZRS define the total receive gains:
a)
b)
ZALL and ZALS define the sidetone compensa-
tion of the circuit.
Figure 6
8/15
V20
V16
V20
V16
G
G
r
r
6dB
ZRL
ZRL
ZALL
ZRS
ZRS
for
ZALS
long
lines
for short lines
The equivalent balancing impedance is given by
the formula:
ZAL = K ZALS + (1 - K) ZALL
where:
-K = 0 at I
-K varies linearly from 0 to 1 with Iline between
ILL and ILS
-K = 1 at I
Calculations to define ZALL and ZALS are:
a)
ZALL = 70 R5
b)
ZALL =70 R5
where:
- Z
- Z
- Z
- Zline (short) and (long) are the impedances of
the line at minimum and naximum line lenght
- R5 = 5.1K
3.3 AC Impedance
The total AC impedance of the circuit to the line
is:
ZAC = Zout//Zint//Zext (ZALS, ZALL >>ZAC)
3.4 Receive Mute (and confidence level)
When the receive channel is muted (Vpin 14 >
2.7V) the receive gain is reduced of 60dB minimum.
ext
int
out
= 10K //8.5nF (internal impedance)
= R6//C4//(Zelectret) (at pin 13)
= 10.65 Z4 (at pin 3; see paragr. 2.2)
LINE
LINE
= ILL or lower (long line)
= ILS or higher (short line)..
1% (typically)
Z
Z
line
line
short
long
Z
Z
Z
Z
out
out
ext
ext
Z
Z
int
int
Z
Z
out
out

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