MAX1761 Maxim, MAX1761 Datasheet - Page 14

• Manufacturer Part Number: MAX1761
• Description: Small / Dual / High-Efficiency Buck Controller for Notebooks
• Manufacturer: Maxim

Small, Dual, High-Efficiency
Buck Controller for Notebooks
The DH and DL outputs are optimized for driving mod-
erate-sized power MOSFETs. The MOSFET drive capa-
bility is stronger for the low-side switch. This is
consistent with the low duty factor seen in the notebook
computer environment where a large V+ to V
ential exists. An adaptive dead-time circuit monitors the
DL output and prevents the high-side FET from turning
on until DL is fully off. There must be a low-resistance,
low-inductance path from the DL driver to the MOSFET
gate for the adaptive dead-time circuit to work properly.
Otherwise, the sense circuitry in the MAX1761 will inter-
pret the MOSFET gate as “off” while there is still charge
left on the gate. Use very short, wide traces measuring
10 to 20 squares or less (50mils to 100mils wide if the
MOSFET is 1 inch from the device). Similar to the DL
output, an adaptive dead-time circuit also monitors the
14
Figure 5. “Valley” Current-Limit Threshold Point
Figure 6. Using a Low-Side Current-Sense Resistor
______________________________________________________________________________________
MAX1761
0
OUT
DH
CS
DL
FB
TIME
V+
MOSFET Gate Drivers
I
PEAK
I
I
LOAD
LIMIT
OUT
V
OUT
differ-
DH output and prevents the low-side FET from turning
on until DH is fully off. The same considerations should
be used for routing the DH signal to the high-side FET.
Since the transition time for a P-channel switch can be
much longer than an N-channel switch, the dead time
prior to the high-side PMOS turning on will be more
pronounced than in other synchronous step-down reg-
ulators, which use high-side N-channel switches. On
the high-to-low transition, the voltage on the inductor’s
"switched" terminal flies below ground until the low-side
switch turns on. A similar dead-time spike occurs on
the opposite low-to-high transition. Depending upon the
magnitude of the load current, these spikes usually
have a minor impact on efficiency.
The high-side drivers (DH_) swing from V+ to GND and
will typically source/sink 0.6A from the gate of the P-
channel MOSFET. The low-side driver (DL_) swings
from VL to ground and will typically source 0.5A and
sink 0.9A from the gate of the N-channel FET.
The internal pulldown transistors that drive DL low are
robust, with a 2.0Ω (typ) on-resistance. This helps pre-
vent DL from being pulled up when the high-side
switch turns on, due to capacitive coupling from the
drain to the gate of the low-side MOSFET. This places
some restrictions on the FETs that can be used. Using
a low-side FET with smaller gate-to-drain capacitance
can prevent these problems.
The MAX1761 has two inputs (ON1, ON2) that control
the operating modes of the two regulators. Asserting
ON1 low places both regulators in micropower shut-
down mode, in which both VL and REF are disabled.
When ON1 is high, OUT1 is enabled, with VL and REF
active. ON2 serves a dual function: it is a shutdown
control for OUT2, and it determines the switching mode
for both regulators. When ON2 is low (ON2 < 0.5V),
OUT2 is disabled and OUT1 operates in normal mode.
Floating ON2 places both outputs in forced PWM
mode. When ON2 is high (2V < ON2 < V
tors run in normal operating mode. Toggling ON1 from
low to high resets the fault latch (Table 4).
The output undervoltage protection function is similar to
foldback current limiting but employs a timer rather
than a variable current limit. If the MAX1761 output volt-
age is under 70% (typ) of the nominal output voltage
20ms after coming out of shutdown, then both PWMs
are latched off and will not restart until V+ is cycled or
ON1 is toggled low to high.
Shutdown and Mode Control Inputs
Output Undervoltage Protection
L
), both regula-