TMC424-PI24 Trinamic Microchips, TMC424-PI24 Datasheet - Page 10

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TMC424-PI24

Manufacturer Part Number
TMC424-PI24
Description
Economic Miniature Three Axis Microstepping Stepper Motor Controller
Manufacturer
Trinamic Microchips
Datasheet
TMC428 DATASHEET (V. 2.00 / November 12, 2003)
The SPI
provided by the microstep unit of the TMC428 individually for each stepper motor. Each primary signal
bit is represented by a five bit code word called primary signal code. The order of primary signal bits
forming the SPI
signal code words in the configuration RAM area.
To switch to the next motor, an additional bit called next motor bit (NxM-Bit) is prefixed to the five bit
wide primary signal code words. So, the total data word width is six bit. Each NxM-Bit effects an
increment of an internal stepper motor address until the processing for all stepper motors within the
daisy chain is completed. A parameter called LSMD (last stepper motor driver) defines the total
number of stepper motors within the daisy chain. So, the codes written into the serial interface
configuration RAM area represent the mapping of control signals provided by the microstep units to
control bits of the drivers. It might be noted here, that configuring the serial driver interface is much
easier as it might seem here. It is explained in detail, illustrated by examples below (see section 11
Stepper Motor Driver Datagram Configuration, page 34).
The timing of the serial driver interface is programmable in a wide range. The clock divider provides 16
up to 512 clock cycles (tCLK) for a serial driver interface data clock period. The default duration of a
clock period (tSCKCL+tSCKCH) of the signal nSCS_S is 16+16=32 clock periods of the clock signal
CLK. The minimal duration of a serial interface clock period (tSCKCL+tSCKCH) is 8+8=16 clock cycles
of signal CLK as outlined in Figure 6-2. Also, the polarities of the signals nSCS_S and SCK_S are
programmable to use driver chips from other vendors with inverted polarities without additional glue
logic.
The input SDI_S of the serial driver interface must always be driven to a defined level. So, to avoid
high impedance (‘Z’) at that input pin while the stepper motor driver chain is idle, a pull-up resistor or a
pull-down resistor of 10 K is required at that input.
Symbol
tSUCSC
tHDCSC
tSCKCL
tSCKCH
tSD
tIS
tSI
tDAMAGRAMuC Datagram Length
tDAMAGRAMuC Datagram Length
fCLK
tCLK
tPD
Table 6-1: Timing characteristics of the serial microcontroller interface
Symbol
tSUSCSdrv
tHDSCSdrv
tCKSL
tCKSH
tDAMAGRAMdrv
tDAMAGRAMdrv
tPD
Table 6-2: Timing characteristics of the serial stepper motor driver interface
Copyright © 2000–2003 TRINAMIC Microchips GmbH
TM
datagram for each stepper motor driver is composed of so called primary signal bits
Parameter
Setup Clocks for nSCS_C
Hold Clocks for nSCS_C
Serial Clock Low
Serial Clock High
SDO_C valid after SCK_C low
nINTERRUPT status valid after nSCS_C low
SDO_C valid after nSCS_C high
Clock Frequency
Clock Period tCLK = 1 / fCLK
CLK-rising-edge-to-Output Propagation Delay
TM
Parameter
Datagram Length
Datagram Length @ fCLK = 16
MHz
CLK-rising-edge to Outputs Delay
datagrams for the stepper motor driver daisy chain is defined by the order of primary
8+8+1*16+8+8=48
Min
8
8
8
8
3
3
3
3
3
2.5
2.5
3+3 + 32*6 = 198
12.375
0
62.5
Min
Typ
16
16
16
16
5
512+64*512+512= 33792
Typ
5
2112
Max
256
256
256
256
Max
3.5
4.5
16
CLK periods
CLK periods
CLK periods
CLK periods
CLK periods
CLK periods
CLK periods
CLK periods
CLK periods
CLK periods
CLK periods
CLK periods
CLK periods
Unit
Unit
MHz
µs
ns
µs
ns
ns
10

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