MAX16812 Maxim Integrated Products, MAX16812 Datasheet - Page 17

• Manufacturer Part Number: MAX16812
• Description: Integrated High-Voltage LED Driver
• Manufacturer: Maxim Integrated Products

The function of the output capacitor is to reduce the
output ripple to acceptable levels. The ESR, ESL, and
the bulk capacitance of the output capacitor contribute
to the output ripple. In most of the applications, the out-
put ESR and ESL effects can be dramatically reduced
by using low-ESR ceramic capacitors. To reduce the
ESL effects, connect multiple ceramic capacitors in
parallel to achieve the required capacitance.
In a buck configuration, the output capacitance, C
is calculated using the following equation:
where ∆V
In a boost configuration, the output capacitance, C
is calculated as:
where C
Figure 15. SEPIC Configuration
C
C
OUT
OUT
OUT
R
is the maximum allowable output ripple.
is the output capacitor.
≥
V
IN
≥
∆
C
V
(
TGRM
V
______________________________________________________________________________________
R
C
(
OUT
IN1
V
INMAX
×
with Analog and PWM Dimming Control
∆
2
V
−
R
×
V
×
L
INMIN
−
V
×
V
OUT
Integrated High-Voltage LED Driver
OUT
R
C
V
TGRM
Output Capacitor
L_REG
)
INMAX
VOUT
×
RT
)
×
×
2
f
SW
×
V
×
OUT
I
OUT
R
R
f
OV1
OV2
SW
2
LV
IN
EN
RT
L_REG
TGRM
DIM
OUT
OUT
R
CS
C
,
,
H_REG
R
MAX16812
REF2
In a buck-boost configuration, the output capacitance,
C
where V
the output current.
An input capacitor connected between IN and ground
must be used when configuring the MAX16812 as a
buck converter. Use a low-ESR input capacitor that can
handle the maximum input RMS ripple current.
Calculate the maximum RMS ripple using the following
equation:
When using the MAX16812 in a boost or buck-boost
configuration, the input capacitor’s RMS current is low
and the input capacitance can be small. However, an
additional electrolytic capacitor may be required to pre-
vent oscillations due to line impedances.
L1
OUT
I
IN(RMS)
R
REF1
is:
C
OUT
OUT
L2
V
IN
R
COMP1
is the voltage across the load and I
=
≥
COMP
I
SRC
DRV
SLP
D
OUT
∆
GT
OUT
V
R
R
COMP2
C
COMP2
×
×
2
C
(
S
V
R
R
C
SRC
×
V
G
C
OUT
SLP
COMP1
OUT
V
OUT
VOUT
V
+
INMIN
× (
V
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×
INMIN
V
Input Capacitor
INMIN
I
OUT
C
)
OUT
×
- V
f
SW
OUT
OUT
)
17
is