MAX1623 Maxim, MAX1623 Datasheet - Page 7

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MAX1623

Manufacturer Part Number
MAX1623
Description
3A / Low-Voltage / Step-Down Regulator with Synchronous Rectification and Internal Switches
Manufacturer
Maxim
Datasheet

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Figure 1. Functional Diagram
At light loads, the device goes into skip mode
(because the load current is below the skip threshold),
and Idle Mode operation (1.25A current limit) begins.
This allows both switches to remain off at the end of the
off-time, skipping cycles to reduce switching losses. At
lighter loads, the inductor current is discontinuous
because the inductor current reaches zero. In Idle
Mode, the operating frequency varies with output load
current. There is no major shift in circuit behavior as the
PWM limit falls below the skip limit. The effective off-
time simply increases, resulting in a seamless transition
between PWM mode and Idle Mode.
PWM operation occurs whenever the load current is
greater than the skip threshold. In this mode, the PWM
comparator adjusts the current limit to the desired out-
put current, so that the P-channel turns on at the end of
each off-time.
Three signals are resistively summed at the input of the
PWM comparator (Figure 1): an output voltage error
signal relative to the reference voltage, an integrated
output voltage error correction signal, and the sensed
Synchronous Rectification and Internal Switches
V
IN
NOTE: HEAVY LINES DENOTE HIGH SWITCHING CURRENT PATHS.
3A, Low-Voltage, Step-Down Regulator with
4.5V TO
5.5V
V
IN
_______________________________________________________________________________________
COMP
SHDN
V
REF
CC
REF
G
MAX1623
m
REF
GND
REF
PWM Mode
Idle Mode
SELECTION
FEEDBACK
FBSEL
PMOS switch current. The integrated error signal is
provided by a transconductance amplifier with an
external capacitor at the COMP pin. This integrator pro-
vides high DC accuracy without the need for a high-
gain error amplifier. Connecting a capacitor at COMP
modifies the overall loop response (see Integrator
Comparator section).
There are two preset output voltages (2.525V and
3.33V), or the output voltage can be adjusted from the
reference voltage (nominally 1.1V) up to 3.8V. For a
preset output voltage (Figure 2), connect FB to the out-
put voltage, and connect FBSEL to V
put) or leave it unconnected (3.33V output). For an
adjustable output, connect FBSEL to GND or REF, and
connect FB to the midpoint of a resistor divider
between the output voltage and ground (Figure 3).
Regulation is maintained when V
R1 in the 10k to 500k range. R2 is given by:
where V
TIMER
TOFF
REF
PWM LOGIC
CURRENT
CURRENT
DRIVERS
SENSE
SENSE
is typically 1.1V.
AND
SKIP
R2 (R1)(V
Setting the Output Voltage
PGND
IN
OUT
LX
FB
/ V
FB
REF
equals V
1)
CC
(2.525V out-
REF
. Select
7

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