ATA5277 ATMEL Corporation, ATA5277 Datasheet - Page 6

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ATA5277

Manufacturer Part Number
ATA5277
Description
Stand-alone Antenna Driver
Manufacturer
ATMEL Corporation
Datasheet
Command Mode
Protocol
6
ATA5277 [Preliminary]
There are two ways to enter standby mode. One is to keep the DIO-line at a high level
for more than 32 ms while the IC is in command mode. A low signal at the DIO line
keeps the IC active and resets the standby timer. As the clock output CLKO remains
active, this configuration can be used to supply a clock signal to a connected
microcontroller.
The second way to shut down the ATA5277 is to set the STBY bit to control command 0.
Note that the IC will switch off operation immediately after receiving the last data bit
(bit 3) of the control command. The rest of the telegram (i.e., acknowledge and stop bit)
is then omitted.
As described above, the communication between a controlling unit and the ATA5277 is
done via a one-wire serial interface. Figure 6 shows the structure of one communication
bit.
Figure 6. Structure of One Communication Bit
All bits start with a falling edge. This pull-down has to be done by the microcontroller and
maintained for at least t
performed. If the ATA5277 is the receiver, the microcontroller has to change the state of
the DIO-line according to the bit it wants to transmit. The maximum time for this setup is
t
dent of the former state of the DIO-line, it has to return to '1' and keep this state for a
minimum time of t
apply the bit to the DIO-line after t
'0' needs to be transmitted). This signal on the DIO-line is then valid for t
Generally, the following conditions have to be met in all cases:
The timing values can be found in the electrical characteristics section for the DIO
interface.
A command consists of a start bit followed by four command bits and four control or sta-
tus bits respectively. It ends with an acknowledge bit and, if no further commands are to
be transmitted, a stop bit.
setup,maximum
t
t
t
t
t
sync,minimum
setup
data
recover
bit
³ t
£
£
bit,minimum
t
data,maximum
³ t
t
setup,maximum
. This state should then be applied for a time of at least t
t
recover,minimum
sync
£
t
sync
recover,minimum
t
setup
< t
setup,maximum
sync,minimum
. If the ATA5277 is the transmitter of the data, the IC will
t
data
sync,minimum
. After that, the setup for the data bit itself has to be
Valid data
(i.e., activate the internal pull-down when a
t
bit
data,minimum
t
data,maximum
recover
4669B–RKE–10/03
. Indepen-
.

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