MAX1464 Maxim, MAX1464 Datasheet - Page 23

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MAX1464

Manufacturer Part Number
MAX1464
Description
Low-Power - Low-Noise Multichannel Sensor Signal Processor
Manufacturer
Maxim
Datasheet

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Description:
Perform a 16-bit logical AND operation, bit for bit, on
the contents of the A-register and the contents of the X-
register. Store the 16-bit result back into the A-register.
The previous contents of the A-register are overwritten
and lost.
Register X can be any of the 16 CPU registers.
PC is incremented once to point to the next instruction
in program memory.
Two’s-complement data format is not preserved.
No branching occurs.
No other registers are affected.
ORX
Op-code:
Operation:
CPU Cycles required:
Description:
Perform a 16-bit logical OR operation, bit for bit, on the
contents of the A-register and the contents of the X-reg-
ister. Store the 16-bit result back into the A-register.
The previous contents of the A-register are overwritten
and lost.
Register X can be any of the 16 CPU registers.
PC is incremented once to point to the next instruction
in program memory.
Two’s-complement data format is not preserved.
No branching occurs.
No other registers are affected.
ADX
Op-code:
Operation:
CPU Cycles required:
Description:
Perform a 16-bit arithmetic addition of the A-register
and the contents of the X-register. Store the low 16 bits
of the result back into the A-register. Any overflow bit
resulting from the addition operation is lost. The previ-
A-register ← A-register OR X-register
PC-register ← PC + 1 (point to next instruction)
1 cycle
A-register ← A-register + X-register
PC-register ← PC + 1 (point to next instruction)
1 cycle
0011 XXXX
ADD Register X to Register A
0100 XXXX
______________________________________________________________________________________
OR Register X with Register A
BINARY
BINARY
Low-Power, Low-Noise Multichannel
3Xh
4Xh
Sensor Signal Processor
ous contents of the A-register are overwritten and lost.
Register X can be any of the 16 CPU registers.
PC is incremented once to point to the next instruction
in program memory.
Two’s-complement data format is preserved.
No branching occurs.
No other registers are affected.
STX
Op-code:
Operation:
CPU Cycles required:
Description:
Perform a 16-bit move operation from the A-register into
the X-register. The A-register contents are unchanged.
The previous contents of the X-register are overwritten
and lost.
Register X can be any of the 16 CPU registers.
PC is incremented once to point to the next instruction
in program memory.
Two’s-complement data format is preserved.
No branching occurs.
No other registers are affected.
SLX
Op-code:
CPU Cycles required:
Operation when X ≠ 6h:
BIT:
Operation when X = 6h:
BIT:
BIT:
15
15
15
X-register ← A-register
PC-register ← PC + 1 (point to next instruction)
1 cycle
PC-register ← PC + 1 (point to next instruction)
1 cycle
14
14
14
13 12 11 10
13 12 11 10
13 12 11 10
0101 XXXX
Shift Left Register X
0110 XXXX
Store Register X
REGISTER X
REGISTER R6
REGISTER M: R4
9
9
9
BINARY
BINARY
8
8
8
7
7
7
6
6
6
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5Xh
6Xh
5
5
5
4
4
4
3
3
3
2
2
2
1
1
1
0
0
0
23
0

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