XR18W750 ON Semiconductor, XR18W750 Datasheet - Page 42

• Manufacturer Part Number: XR18W750
• Manufacturer: ON Semiconductor

XR18W750
WIRELESS UART CONTROLLER
F
F
IGURE
IGURE
(Unloading)
(Unloading)
(Loading data
(Loading data
*INT cleared when the ISR is read or when TX FIFO fills up to trigger level.
*INT is cleared when the ISR is read or when TX FIFO fills up to the trigger level.
20. T
21. T
into FIFO)
into FIFO)
TX
INT*
TXRDY#
IOW#
TX
INT*
TXRDY#
IOW#
RANSMIT
RANSMIT
TX FIFO
enabled
Empty
enabled
IER[1]
IER[1]
TX FIFO
Data in
Start
Bit
S
R
R
D0:D7
EADY
EADY
ISR Read
Stop
Bit
T
Start
& I
Bit
& I
ISR is read
S
S
T
D0:D7
D0:D7
NTERRUPT
NTERRUPT
WT
TX FIFO fills up
to trigger level
TX FIFO fills up
to trigger level
Stop
Bit
T
T
T
T
S
IMING
IMING
D0:D7
D0:D7
[FIFO M
[FIFO M
T
S
S
TX FIFO
42
Full
D0:D7
D0:D7
T
T
WRI
WRI
ODE
ODE
T
T
, DMA M
, DMA M
T
T
SRT
SI
T
S
S
D0:D7
D0:D7
ODE
below trigger level
ODE
T
TX FIFO drops
WT
T
T
D
E
S
S
NABLED
ISABLED
ISR is read
D0:D7
D0:D7
below trigger level
TX FIFO drops
T
T
] - P
T
SI
]
empty location
At least 1
in FIFO
ARALLEL
ISR Read
S
S
Last Data Byte
Last Data Byte
Transmitted
Transmitted
D0:D7
D0:D7
TXDMA#
TX FIFO
TXDMA
Empty
T
M
SRT
T
T
REV. 1.0.0
ODE