MAX1403 Maxim, MAX1403 Datasheet - Page 6

• Manufacturer Part Number: MAX1403
• Description: +3V / 18-Bit / Low-Power / Multichannel / Oversampling Sigma-Delta ADC
• Manufacturer: Maxim

ELECTRICAL CHARACTERISTICS (continued)
(V+ = +2.7V to +3.6V, V
otherwise noted. Typical values are at T
+3V, 18-Bit, Low-Power, Multichannel,
Oversampling (Sigma-Delta) ADC
6
Note 1: Contact factory for INL limits applicable with FS1 = 0 and MF1, MF0 = 1, 2, or 3.
Note 2: Nominal gain is 0.98. This ensures a full-scale input voltage may be applied to the part under all conditions without caus-
Note 3: Positive Full-Scale Error includes zero-scale errors (unipolar offset error or bipolar zero error) and applies to both unipolar
Note 4: Full-Scale Drift includes zero-scale drift (unipolar offset drift or bipolar zero drift) and applies to both unipolar and bipolar
Note 5: Gain Error does not include zero-scale errors. It is calculated as (full-scale error - unipolar offset error) for unipolar ranges
Note 6: Gain-Error Drift does not include unipolar offset drift or bipolar zero drift. It is effectively the drift of the part if zero-scale
Note 7: Use of the offset DAC does not imply that any input may be taken below AGND.
Note 8: Additional noise added by the offset DAC is dependent on the filter cutoff, gain, and DAC setting. No noise is added for a
Note 9: Guaranteed by design or characterization; not production tested.
Note 10: The absolute input voltage must be within the input voltage range specification.
Note 11: All AIN and REFIN pins have identical input structures. Leakage is production tested only for the AIN3, AIN4, AIN5,
Note 12: The dynamic load presented by the MAX1403 analog inputs for each gain setting is discussed in detail in the Switching
Note 13: The input voltage range for the analog inputs is with respect to the voltage on the negative input of its respective differen-
Note 14: V
Note 15: These specifications apply to CLKOUT only when driving a single CMOS load.
POWER DISSIPATION (V+ = V
disabled, X2CLK = 0, CLK = 0 for 1.024MHz, CLK = 1 for 2.4576MHz.)
Power Dissipation
Standby Power Dissipation
_______________________________________________________________________________________
PARAMETER
ing saturation of the digital output data.
and bipolar input ranges. This error does not include the nominal gain of 0.98.
input ranges.
and as (full-scale error - bipolar zero error) for bipolar ranges. This error does not include the nominal gain of 0.98.
error is removed.
DAC code of 0000.
CALGAIN, and CALOFF inputs.
Network section . Values are provided for the maximum allowable external series resistance.
tial or pseudo-differential pair. Table 5 shows which inputs form differential pairs.
REF
= V
REFIN+
DD
- V
= +2.7V to +3.6V, V
REFIN-
DD
.
SYMBOL
= +3.3V, digital inputs = 0 or V
PD
A
= +25°C.)
Normal mode,
MF1 = 0,
MF0 = 0
2X mode,
MF1 = 0,
MF0 = 1
4X mode,
MF1 = 1,
MF0 = 0
8X mode,
MF1 = 1,
MF0 = 1
(Note 19)
REFIN+
= +1.25V, REFIN- = AGND, f
CONDITIONS
1.024MHz
2.4576MHz
1.024MHz
2.4576MHz
1.024MHz
2.4576MHz
1.024MHz
2.4576MHz
DD
, external CLKIN, burn-out and transducer excitation currents
Buffers off
Buffers on
Buffers off
Buffers on
Buffers off
Buffers on
Buffers off
Buffers on
Buffers off
Buffers on
Buffers off
Buffers on
Buffers off
Buffers on
Buffers off
Buffers on
CLKIN
= 2.4576MHz, T
MIN
TYP
0.81
1.45
1.32
2.51
1.08
2.28
1.95
4.53
1.75
4.32
6.67
16.6
6.44
16.4
16.9
A
7.0
7
= T
MIN
21.45
MAX
1.36
2.05
1.98
3.30
2.97
6.11
8.58
21.2
8.91
to T
70
MAX
UNITS
, unless
mW
µW