MAX1304 Maxim, MAX1304 Datasheet - Page 15

• Manufacturer Part Number: MAX1304
• Description: 8-/4-/2-Channel / 12-Bit / Simultaneous-Sampling ADCs with 10V / 5V / and 0 to +5V Analog Input Ranges
• Manufacturer: Maxim

8-/4-/2-Channel, 12-Bit, Simultaneous-Sampling ADCs
Figure 1. Digital Load Test Circuit
MAX1304
MAX1308
MAX1312
DEVICE PIN
with ±10V, ±5V, and 0 to +5V Analog Input Ranges
44
45
46
47
48
—
MAX1305
MAX1309
MAX1313
11, 12
9, 10,
PIN
44
45
46
47
48
______________________________________________________________________________________
100pF
MAX1306
MAX1310
MAX1314
10, 11, 12
7, 8, 9,
44
45
46
47
48
V
DD
I
I
OL
OH
C ON V S T
CHSHDN
NAME
= 1.6mA
SHDN
= 0.8mA
CLK
I.C.
CS
Chip-Select Input. Pulling CS low activates the digital interface. Forcing CS high
places D0–D11 in high-impedance mode.
Conversion Start Input. Driving CONVST high initiates the conversion process.
The analog inputs are sampled on the rising edge of CONVST.
External Clock Input. For external clock operation, connect INTCLK/EXTCLK to
DGND and drive CLK with an external clock signal from 100kHz to 20MHz. For
internal clock operation, connect INTCLK/EXTCLK to DV
DGND.
Shutdown Input. Driving SHDN high initiates device shutdown. Connect SHDN
to DGND for normal operation.
Active-Low Analog-Input Channel-Shutdown Input. Drive CHSHDN low to
power down analog inputs that are not selected for conversion in the
configuration register. Drive CHSHDN high to power up all analog input
channels regardless of whether they are selected for conversion in the
configuration register. See the Channel Shutdown ( CHSHDN ) section for more
information.
Internally connected. Connect I.C. to AGND.
1.6V
The MAX1304–MAX1306/MAX1308–MAX1310/MAX1312–
MAX1314 are 12-bit ADCs. The devices offer 8, 4, or 2
independently selectable input channels, each with
dedicated T/H circuitry. Simultaneous sampling of all
active channels preserves relative phase information
making these devices ideal for motor control and power
monitoring. Three input ranges are available, 0 to +5V,
±5V and ±10V. The 0 to +5V devices provide ±6V fault-
tolerant inputs. The ±5V and ±10V devices provide
±16.5V fault-tolerant inputs. Two-channel conversion
results are available in 0.9µs. Conversion results from
all eight channels are available in 1.98µs. The 8-chan-
nel throughput is 456ksps per channel. Internal or
external reference and clock capability offer great flexi-
bility, and ease of use. A write-only configuration regis-
ter can mask out unused channels and a shutdown
feature reduces power. A 20MHz, 12-bit, parallel data
bus outputs the conversion results. Figure 2 shows the
functional diagram of these ADCs.
Pin Description (continued)
FUNCTION
Detailed Description
DD
and connect CLK to
15