MAX1278 Maxim Integrated Products, MAX1278 Datasheet - Page 15

• Manufacturer Part Number: MAX1278
• Description: (MAX1276 / MAX1278) 12-Bit ADCs
• Manufacturer: Maxim Integrated Products

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pin to the TMS320C54_ supply voltage when the
MAX1276/MAX1278 are operating with an analog sup-
ply voltage higher than the DSP supply voltage. The
word length can be set to 8 bits with FO = 1 to imple-
ment the power-down modes. The CNVST pin must idle
high to remain in either power-down state.
Another method of connecting the MAX1276/MAX1278
to the TMS320C54_ is to generate the clock signals
external to either device. This connection is shown in
Figure 16, where serial clock (CLOCK) drives the
Figure 15. Interfacing to the TMS320C54_ Internal Clocks
Figure 16. Interfacing to the TMS320C54_ External Clocks
Figure 17. DSP Interface—Continuous Conversion
Differential, 12-Bit ADCs with Internal Reference
CNVST
DOUT
SCLK
MAX1276
MAX1278
MAX1276
MAX1278
CONVERT
CLOCK
D0
CNVST
CNVST
DOUT
DOUT
SCLK
SCLK
______________________________________________________________________________________
V
V
1.8Msps, Single-Supply, Low-Power, True-
L
L
0
1
0
0
DV
CLKX
CLKR
FSX
FSR
DR
DV
CLKR
FSR
DR
0
DD
DD
TMS320C54_
TMS320C54_
D11
D10
D9
D8
CLKR, and SCLK and the convert signal (CONVERT)
drive the FSR and CNVST.
The serial port must be set up to accept an external
receive-clock and external receive-frame sync.
The SPC register should be written as follows:
TXM = 0, external frame sync
MCM = 0, CLKX is taken from the CLKX pin
FSM = 1, burst mode
FO = 0, data transmitted/received as 16-bit words
This setup allows continuous conversion, provided that
the DRR is serviced before the next conversion.
Alternatively, autobuffering can be enabled when using
the buffered serial port to read the data without CPU
intervention. Connect the V
supply voltage when the MAX1276/MAX1278 are oper-
ating with an analog supply voltage higher than the
DSP supply voltage.
The MAX1276/MAX1278 can also be connected to the
TMS320C54_ by using the data transmit (DX) pin to
drive CNVST and the CLKX generated internally to
drive SCLK. A pullup resistor is required on the CNVST
signal to keep it high when DX goes high impedance
and 0001hex should be written to the DXR continuously
for continuous conversions. The power-down modes
may be entered by writing 00FFhex to the DXR (see
Figures 17 and 18).
The MAX1276/MAX1278 can be directly connected to
the ADSP21_ _ _ family of DSPs from Analog Devices,
Inc. Figure 19 shows the direct connection of the
MAX1276/MAX1278 to the ADSP21_ _ _. There are two
modes of operation that can be programmed to interface
with the MAX1276/MAX1278. For continuous conver-
sions, idle CNVST low and pulse it high for one clock
cycle during the LSB of the previous transmitted word.
The ADSP21_ _ _ STCTL and SRCTL registers should be
configured for early framing (LAFR = 0) and for an
D7
D6
D5
DSP Interface to the ADSP21_ _ _
D4
D3
D2
L
D1
pin to the TMS320C54_
D0
0
1
0
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