MAX1248 Maxim, MAX1248 Datasheet - Page 11

• Manufacturer Part Number: MAX1248
• Description: 2x4-Channel / Simultaneous-Sampling 14-Bit DAS
• Manufacturer: Maxim

CS goes high; after the next CS falling edge, SSTRB will
output a logic low. Figure 7 shows the SSTRB timing in
external clock mode.
The conversion must complete in some minimum time,
or droop on the sample-and-hold capacitors may
degrade conversion results. Use internal clock mode if
Figure 5. 24-Clock External Clock Mode Conversion Timing (MICROWIRE and SPI-Compatible, QSPI-Compatible with f
Figure 6. Detailed Serial-Interface Timing
SSTRB
A/D STATE
DOUT
SCLK
DIN
CS
DOUT
SCLK
DIN
CS
START
1
SEL2 SEL1 SEL0
t
CSH
______________________________________________________________________________________
+2.7V to +5.25V, Low-Power, 4-Channel,
IDLE
RB1
t
4
DV
t
CSS
UNI/
BIP
t
DS
t
DH
SGL/
ACQUISITION
(f
DIF
CLK
1.5µs
t
PD1 PD0
ACQ
= 2MHz)
8
t
Serial 10-Bit ADCs in QSOP-16
CL
MSB
t
B9
CH
B8
B7
12
the serial-clock frequency is less than 100kHz, or if
serial-clock interruptions could cause the conversion
interval to exceed 120µs.
RB2
B6
CONVERSION
B5
B4
B3
16
B2
t
DO
B1
LSB
B0
S1
t
CSH
20
RB3
S0
FILLED WITH
ZEROS
IDLE
t
TR
SCLK
24
≤ 2MHz)
11