FLEX10KE Altera Corporation, FLEX10KE Datasheet - Page 3

• Manufacturer Part Number: FLEX10KE
• Description: Pci Development Board For Epf10k Series
• Manufacturer: Altera Corporation

Note:
(1)
Altera Corporation
JTAG EPC2
JTAG EPC2,
FLEX
JTAG EPC2,
FLEX,
Expansion
PS
Configuration
with EPC2
Table 1. Programming & Configuration Options
Device(s)
When programming the EPC2 devices, the first Programmer Object File (.pof) should target device 0 and the second
POF should target device 1.
Mode/
Mounted
Mounted
Mounted
Removed
Mounted
EPC2
Table 1
their settings. Refer to the board schematics for more details.
Clock Network Selection/Default
The clock signal on the PCI development board can arrive from various
clocking sources including system clock, external clock, and
on-board crystal oscillator (not included). The PLL devices provide zero-
delay clock signal distribution throughout the board to minimize clock
skew within the same clock network. Clock selection can be done by
installing selected resistor(s).
Connected to
JTAG header
Connected to
JTAG header
Connected to
JTAG header
Connected to
BitBlaster
header
Removed
MasterBlaster
ByteBlaster/
shows the programming and configuration options available and
SW1
SW2, SW3
SW2, SW4,
SW5, SW6,
SW7
None
SW10
Dip-Switch On
Note (1)
FLEX PCI Development Board Data Sheet
Programs the EPC2 devices in JTAG mode
using the MAX+PLUS II or Quartus II
software. The EPC2 devices are device 0
and device 1. This setting is the default for
the board.
Places the EPC2 devices and the FLEX
device in the JTAG chain. The EPC2
devices are device 0 and device 1, the
FLEX device is device 2, and the PMC
device is device 3.
Places the EPC2 device(s), FLEX device,
and the PMC connector in the JTAG chain.
The EPC2 device(s) are device 0 and
device 1, the FLEX device is device 2, and
the PMC device is device 3.
Configures the FLEX device in PS mode
using the MAX+PLUS II or Quartus II
software.
Configures the FLEX device with the data
programmed into the EPC2 device(s).
Description
3