EB02 Apex Microtechnology Corporation, EB02 Datasheet - Page 2

• Manufacturer Part Number: EB02
• Description: Motion Control
• Manufacturer: Apex Microtechnology Corporation

EB02
ABSOLUTE MAXIMUM RATINGS
SPECIFICATIONS
PARAMETER
POSITIVE OUTPUT VOLTAGE
NEGATIVE OUTPUT VOLTAGE
POSITIVE EDGE DELAY
RISETIME
NEGATIVE EDGE DELAY
FALLTIME
PWM FREQUENCY
INPUT IMPEDANCE
INPUT AND OUTPUT SIGNALS
PIN
1
2
3
4
5
6
7
8
9
10
11
12
NOTES: 1.
INPUT
the half bridge. A logic level high turns on the FET and
low turns it off. A common shut down input turns off all
FETs when high.
2/3 V
interfaces with CMOS or HCMOS provided that the Vdd for
the logic family and the EB02 are the same.
the TTL gates driving the EB02, and Vdd for the EB02 is the
same supply as V
all other inputs low, insuring that all outputs are off.
APEX MICROTECHNOLOGY CORPORATION • 5980 NORTH SHANNON ROAD • TUCSON, ARIZONA 85741 • USA • APPLICATIONS HOTLINE: [phone]
2
A logic level input independently controls each FET in
All inputs are Schmitt triggers with the upper threshold at
TTL families may be used if a pull-up to Vcc is added to
An open signal connector pulls the shut down input high and
dd
and the lower threshold at 1/3 V
2.
3.
SYMBOL
V
Lin3
Hin3
V
V
Lin2
V
Hin2
V
Lin1
SD
Hin1
Over full operating temperature range.
Long term operation at the maximum junction temperature will result in reduced product life. Lower internal temperature by
reducing internal dissipation or using better heatsinking to achieve high MTTF.
Each FET.
cc
dd
cc
ss
cc
3
2
1
cc
for the TTL family.
I
HV=100V, Fpwm=50kHz, L=100 µH
Set by external circuitry
Set by internal resistors
TEST CONDITIONS
OUT
FUNCTION
Gate supply 3
Low drive logic in 3
High drive logic in 3
Logic supply
Gate supply 2
Low drive logic in 2
Signal ground
High drive logic in 2
Gate supply 1
Low drive logic in 1
Shut down logic in
High drive logic in 1
dd
=10A; V
. This comfortably
MOTOR VOLTAGE SUPPLY, HV
OUTPUT CURRENT, peak
OUTPUT CURRENT, continuous
GATE SUPPLY VOLTAGE, Vcc
LOGIC SUPPLY VOLTAGE, Vdd
POWER DISSIPATION, internal
LOGIC INPUT VOLTAGE
THERMAL RESISTANCE TO CASE
TEMPERATURE, pin solder, 10s
TEMPERATURE, junction
TEMPERATURE RANGE, storage
OPERATING TEMPERATURE, case
cc
=10.8V, V
"
"
"
"
"
dd
=5V;
one input is open circuited a high radiated noise level could
spuriously turn on a FET.
OUTPUT
bridge. Separate HV supply, emitter, and HV return lines are
provided for each section.
the saturation voltage is 1.5 V maximum, over the full
environmental range.
When switching an inductive load this diode will conduct,
and the drop at 10A will be 1.5V maximum, over the full
environmental range.
However, input impedance is 50k on all inputs; therefore, if
Each output section consists of a switching mode FET half
The FETs are conservatively rated to carry 10A. At 10A
Each FET has an intrinsic diode connected in anti-parallel.
PIN
13
14
15
16
17
18
19
20
21
22
23
24
2
99.2
-1.5
MIN
1
1
3
SYMBOL
HV1
OUT1
S1
HVRTN1
HV2
OUT 2
S2
HVRTN2
HV3
OUT 3
S3
HVRTN 3
TYP
5 0
260
310
50
50
ABSOLUTE MAXIMUM RATINGS
100V
20A
10A
20V
20V
51 Watts
-0.3V to V
2.1°C/Watt
300°C
150°C
–55 to +150°C
–25 to +85°C
FUNCTION
High Voltage supply 1
Section 1 output
Section 1 source
Section 1 return
High voltage supply 2
Section 2 output
Section 2 source
Section 2 return
High voltage supply 3
Section 3 output
Section 3 source
Section 3 return
101.5
MAX
50
.8
dd
SPECIFICATIONS
+ 0.3V
n-second
n-second
n-second
n-second
UNITS
k-ohm
Volts
Volts
kHz