AD9923 Analog Devices, AD9923 Datasheet - Page 55

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AD9923

Manufacturer Part Number
AD9923
Description
Manufacturer
Analog Devices
Datasheet

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Table 96.
ISRC1 Valid
0
1
0xC8
0xC9
0xCA
0xCB
0xCC
0xCD
0xCE
0xCF
0xD0
0xD1
0xD2
0xD3
0xD4
0xD5
0xD6
0xD7
0xD8
See Register 0x87 for a description.
See Register 0x87 for a description.
2-0
These bits define where in the ISRC track the samples
are: at least two transmissions of 001 occur at the
beginning of the track, while in the middle of the
track, continuous transmission of 010 occurs followed
by at least two transmissions of 100 near the end of the
track.
7-0
7-0
7-0
7-0
7-0
7-0
6-0
7-0
7-0
7-0
7-0
7-0
7-0
7-0
6-0
7-0
Description
ISRC1 status bits and PBs not valid
ISRC1 status bits and PBs valid
ISRC Status
ISRC1 Packet Byte 0 (ISRC1_PB0)
ISRC1_PB1
ISRC1_PB2
ISRC1_PB3
ISRC1_PB4
ISRC1_PB5
New Data Flags
ISRC1_PB6
ISRC1_PB7
ISRC1_PB8
ISRC1_PB9
ISRC1_PB10
ISRC1_PB11
ISRC1_PB12
New Data Flags
ISRC1_PB13
Rev. 0 | Page 55 of 64
0xD9
0xDA
0xDB
0xDC
0xDD
0xDE
0xDF
0xE0
0xE1
0xE2
0xE3
0xE4
0xE5
0xE6
0xE7
0xE8
0xE9
0xEA
0xEB
0xEC
0xED
0xEE
See Register 0x87 for a description.
7-0
7-0
7-0
7-0
This is transmitted only when the ISRC continue bit
(Register 0xC8 Bit 7) is set to 1.
7-0
7-0
6-0
7-0
7-0
7-0
7-0
7-0
7-0
7-0
6-0
See Register 0x87 for a description.
7-0
7-0
7-0
7-0
7-0
7-0
7-0
ISRC1_PB14
ISRC1_PB15
ISRC1_PB16
ISRC2 Packet Byte 0 (ISRC2_PB0)
ISRC2_PB1
ISRC2_PB2
New Data Flags
ISRC2_PB3
ISRC2_PB4
ISRC2_PB5
ISRC2_PB6
ISRC2_PB7
ISRC2_PB8
ISRC2_PB9
New Data Flags
ISRC2_PB10
ISRC2_PB11
ISRC2_PB12
ISRC2_PB13
ISRC2_PB14
ISRC2_PB15
ISRC2_PB16
AD9880

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