LM32 National Semiconductor Corporation, LM32 Datasheet - Page 14

• Manufacturer Part Number: LM32
• Description: Dual Thermal Diode Temperature Sensor With SensorPath™ Bus
• Manufacturer: National Semiconductor Corporation

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-011 111
0Bh-1Fh
000 000
000 001
000 010
000 100
000 101
001 000
001 001
001 010
100 000
100 001
-111 111
21h-3Fh
000 011
001 011
2.0 Register Set
2.1 REGISTER SET SUMMARY
* Depends on state of ADD pins see Section 2.3 "Device Number".
2.2 DEVICE RESET OPERATION
A Device Reset operation is performed in the following conditions:
The Device Reset operation performs the following:
2.3 DEVICE NUMBER (Addr: 000 000; 00h)
This register is used to specify a unique address for each device on the bus.
Add
• At device power-up.
• When the Reset bit in the Device Control register is set to 1 (see Section 2.8 "Device Control").
• Aborts any device operation in progress and restarts device operation.
• Sets all device registers to their "Reset" (default) value.
Reg
00h
01h
02h
03h
04h
05h
08h
09h
0Ah
20h
Register
Name
Device
Number
Manufacturer
ID
Device ID
Capabilities
Fixed
Device
Status
Device
Control
Temperature
Capabilities
Processor/
Remote
Temperature
Data
Readout
Local
Temperature
Data
Readout
Temperature
Control
Reserved
Conversion
Rate
Undefined
Registers
R/
W
R/
W
R/
W
R/
W
R
R 100Bh
R
R
R
R 0549h
R
R
R
23h
01h
Val
0h
0h
0h
2h
O
R
P
*
MSb
MSb
Sign
Bit
15
0
0
0
0
0
0
Reserved
128
Bit
14
˚C
0
0
0
0
0
0
RevID
64˚C 32˚C 16˚C 8˚C 4˚C 2˚C
Bit
13
0
0
0
0
0
0
Not Available
Not Available
Not Available
Bit
12
1
0
0
0
0
0
Bit
11
# of Remotes
0
0
0
0
0
0
Reserved
14
Reserved
Reserved
Bit
10
0
0
0
0
1
0
Bit
9
0
0
0
0
0
0
Sens
Undefined
Undefined
Bit
Int
8
0
0
0
0
1
0
Rout
BER
Size
Bit
˚C
7
0
0
0
0
0
0
1
0
0
Sign
LSb
Reserved
0.5
Bit
˚C
6
0
0
0
0
0
0
1
0
0
Reserved
Device ID
Reserved
Bit
5
0
0
1
0
0
0
0
0
0
0
0
Res
Res
10-Bits
ERF1
EnF1
Bit
4
0
0
0
0
0
0
0
0
0
EN2 EN1 EN0 ATE
Res Low
Bit
3
0
1
0
0
0
0
1
0
SNUM
FuncDescriptor 1
Reserved
(Temperature)
See Section 2.3
Pwr
Bit
2
0
0
0
0
0
0
Resolution
down
0.5˚C
Shut
CR1 CR0
Res Res
Bit
EF
1
1
1
0
0
0
0
LSb
SF1
Res
Bit
set
Re
0
1
1
1
1
0
0