AD9889 Analog Devices, AD9889 Datasheet - Page 37

• Manufacturer Part Number: AD9889
• Description: High Performance HDMI/DVI Transmitter
• Manufacturer: Analog Devices

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4
SOURCE PRODUCT DESCRIPTION (SPD) INFOFRAME
0x52—Bits[7:0] SPD_B1
This is the first character in eight (VN1-VN8) that is the name
of the company that appears on the product. The data
characters are 7-bit ASCII code.
0x53—Bits[7:0] SPD_B 2 (VN2)
0x54—Bits[7:0] SPD_B 3(VN3)
0x55—Bits[7:0] SPD_B 4(VN4)
0x56—Bits[7:0] SPD_B 5(VN5)
0x57—Bits[7:0] SPD_B 6(VN6)
0x58—Bits[7:0] SPD_B 7(VN7)
0x59—Bits[7:0] SPD_B 8(VN8)
0x5A—Bits[7:0] SBD_B9
Product Description Character 1 (PD1)
This is the first character of 16 that contains the model number
and a short description of the product. The data characters are
7-bit ASCII code.
0x5B—Bits[7:0] SBD_B10(PD2)
0x5C—Bits[7:0] SBD_B11(PD3)
0x5D—Bits[7:0] SBD_B12(PD4)
0x5E—Bits[7:0] SBD_B13(PD5)
0x5F—Bits[7:0] SBD_B14(PD6)
0x60—Bits[7:0] SBD_B15(PD7)
0x61—Bits[7:0] SBD_B16(PD8)
0x62—Bits[7:0] SBD_B17(PD9)
0x63—Bits[7:0] SBD_B18(PD10)
0x64—Bits[7:0] SBD_B19(PD11)
0x65—Bits[7:0] SBD_B20(PD12)
0x66—Bits[7:0] SBD_B21(PD13)
0x67—Bits[7:0] SBD_B22(PD14)
0x68—Bits[7:0] SBD_B23(PD15)
0x69—Bits[7:0] SBD_B24(PD16)
0x6A—Bits[7:0] Source Device Information Code
These bytes classify the source device.
Table 26.
SDI Code
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x0A to 0xFF
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Source
Unknown
Digital STB
DVD
D-VHS
HDD Video
DVC
DSC
Video CD
Game
PC general
Reserved
Rev. 0 | Page 37 of 48
0x6B—Bits[7:0] MPEG_B0
This is the lower 8 bits of 32 bits that specify the MPEG bit rate
in Hz.
0x6C—Bits[7:0] MPEG_B1
0x6D—Bits[7:0] MPEG_B2
0x6E—Bits[7:0] MPEG_B3
0x73—Bits[7] ISRC1 Continued
This bit indicates that a continuation of the 16 ISRC1 packet
bytes (an ISRC2 packet) is being transmitted.
0x73—Bit[6] ISRC1 Valid
This bit indicates whether ISRC1 packet bytes are valid.
Table 27.
ISRC1
0
1
0x73—Bits[5:3] ISRC1 Status
These bits define where the samples are in the ISRC track: at
least two transmissions of 001 occur at the beginning of the
track; continuous transmission of 010 occurs in the middle of
the track, followed by at least two transmissions of 100 near the
end of the track.
0x74—Bits[7:0] ISRC1_PB0
0x75—Bits[7:0] ISRC1_PB1
0x76—Bits[7:0] ISRC1_PB2
0x77—Bits[7:0] ISRC1_PB3
0x78—Bits[7:0] ISRC1_PB4
0x79—Bits[7:0] ISRC1_PB5
0x7A—Bits[7:0] ISRC1_PB6
0x7B—Bits[7:0] ISRC1_PB7
0x7C—Bits[7:0] ISRC1_PB8
0x7D—Bits[7:0] ISRC1_PB9
0x7E—Bits[7:0] ISRC1_PB10
0x7F—Bits[7:0] ISRC1_PB11
0x80—Bits[7:0] ISRC1_PB12
0x81—Bits[7:0] ISRC1_PB13
0x82—Bits[7:0] ISRC1_PB14
0x83—Bits[7:0] ISRC1_PB15
Valid
ISRC1 Status bits and PBs not valid
ISRC1 Status bits and PBs valid
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