AD9850 Analog Devices, AD9850 Datasheet - Page 12

• Manufacturer Part Number: AD9850
• Description: CMOS/ 125 MHz Complete DDS Synthesizer
• Manufacturer: Analog Devices

AD9850
W0
W1
W2
W3
W4
W5
W6
W7
W8
W9
W10
W11
W12
W13
REQUIRED TO RESET CONTROL REGISTERS
(PARALLEL)
DATA (W0)
NOTE: FOR DEVICE START-UP IN SERIAL MODE, HARD-WIRE LEAD 2 AT “0”, LEAD 3 AT “1”, AND LEAD 4 AT “1”
(SEE FIGURE 23).
W CLK
FQ UD
Freq-b0 (LSB)
Freq-b1
Freq-b2
Freq-b3
Freq-b4
Freq-b5
Freq-b6
Freq-b7
Freq-b8
Freq-b9
Freq-b10
Freq-b11
Freq-b12
Freq-b13
Figure 23. Leads 2–4 Connection for Default Serial-Mode Operation
FQ UD
DATA –
W CLK
Figure 24. Serial-Load Frequency/Phase Update Sequence
Table IV. 40-Bit Serial-Load Word Function Assignment
DATA (SERIAL)
Figure 22. Serial-Load Enable Sequence
SUPPLY
W0
W14
W15
W16
W17
W18
W19
W20
W21
W22
W23
W24
W25
W26
W27
+V
XXXXX011
W1
ENABLE SERIAL MODE
Freq-b14
Freq-b15
Freq-b16
Freq-b17
Freq-b18
Freq-b19
Freq-b20
Freq-b21
Freq-b22
Freq-b23
Freq-b24
Freq-b25
Freq-b26
Freq-b27
NOTE: AT LEAST FIRST 8 BITS OF 40-BIT SERIAL LOAD WORD
ARE REQUIRED TO SHIFT IN REQUIRED W32–W34 DATA
–12–
40 W CLK CYCLES
W2
2
3
4
AD9850BRS
W3
W32 = 0
W28
W29
W30
W31
W32
W33
W34
W35
W36
W37
W38
W39
W33 = 0
W39
Freq-b28
Freq-b29
Freq-b30
Freq-b31 (MSB)
Control
Control
Power-Down
Phase-b0 (LSB)
Phase-b1
Phase-b2
Phase-b3
Phase-b4 (MSB)
RESET CONTROL WORDS
W34 = 0
REV. E