USB3450 Standard Microsystems Corporation, USB3450 Datasheet - Page 20

• Manufacturer Part Number: USB3450
• Description: Hi-speed USB HOST OR Device PHY WITH Utmi+interface
• Manufacturer: Standard Microsystems Corporation

Chapter 6 Detailed Functional Overview
Revision 0.1 (05-11-05)
6.1
Figure 2.1 on page 9
described in detail below.
The USB3450 supports an 8-bit bi-directional parallel interface.
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■
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Figure 6.1
TXREADY is only asserted for one CLKOUT per byte time to signal the Link that the data on the DATA
lines has been read by the PHY. The Link may hold the data on the DATA lines for the duration of the
byte time. Transitions of TXVALID must meet the defined setup and hold times relative to CLKOUT.
Figure 6.2
RXACTIVE “frames” a packet, transitioning only at the beginning and end of a packet. However
transitions of RXVALID may take place any time 8 bits of data are available.
how RXVALID is only asserted for one CLKOUT cycle per byte time even though the data may be
presented for the full byte time. The XCVRSELECT signal determines whether the HS or FS timing
relationship is applied to the data and control signals.
8bit Bi-Directional Data Bus Operation
Figure 6.1 FS CLK Relationship to Transmit Data and Control Signals
Figure 6.2 FS CLK Relationship to Receive Data and Control Signals
CLKOUT runs at 60MHz
The 8-bit data bus (DATA[7:0]) is used for transmit when TXVALID = 1
The 8-bit data bus (DATA[7:0]) is used for receive when TXVALID = 0
shows the relationship between CLKOUT and the transmit data transfer signals in FS mode.
shows the relationship between CLKOUT and the receive data control signals in FS mode.
shows the functional block diagram of the USB3450. Each of the functions is
DATASHEET
20
Hi-Speed USB Host or Device PHY With UTMI+ Interface
Figure 6.2
SMSC USB3450
also shows
Datasheet