SIM3U1XX-B-DK Silicon_Laboratories, SIM3U1XX-B-DK Datasheet - Page 14

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SIM3U1XX-B-DK

Manufacturer Part Number
SIM3U1XX-B-DK
Description
Specifications: Lead Free Status: Lead Free ; RoHS Status: RoHS Compliant
Manufacturer
Silicon_Laboratories
Datasheet
UDP SiM3U1xx
4.15.1. P0.1, P0.2, P0.3, P0.4, P1.8, P1.7
Pins P0.1, P0.2, P0.3, P0.4, P1.7, P1.8 all connect to the capacitive sensing slider by default. To disconnect any of
these pins from the capacitive sensing slider, remove the 0  resistor that is connected to the port pin (R16 - R21).
4.15.2. P0.9, P0.10
Pins P0.9 and P0.10 both connect to the 32.768 kHz RTC by default. To disconnect this pin from the RTC, remove
the crystal Y2 on the board. Alternatively, the 0  resistors R5 and R6 can be removed to disconnect the RTC
circuit from the headers on J5.
4.15.3. P0.11
Pin P0.11 connects to the VREFGND terminal on H1 by default. By default, P0.11 is not used as VREFGND and is
instead a GPIO pin.
4.15.4. P0.12
Pin P0.12 connects to the RX pin of the CP210x by default. Alternatively, P0.12 can be enabled for use with the
VREF.
4.15.5. P0.13
Pin P0.13 connects to the TX pin of the CP210x by default. Alternatively, P0.13 can be enabled for use with the
IDAC.
14
MCU Pin
P3.10
P3.11
P3.9
P4.0
P4.1
P4.2
P4.3
P4.4
P4.5
EBID_SCK
EBID_SDA
Default
MCU Card Function
Table 6. MCU Pin Functions (Continued)
Optional
User Control
Rev. 0.2
ON
EPCA_CH0_MOTOR
EPCA_CH1_MOTOR
EPCA_CH2_MOTOR
EPCA_CH3_MOTOR
EPCA_CH4_MOTOR
EPCA_CH5_MOTOR
LPTIMER_OUT_A
UDPBUS_SDA_A
UDPBUS_SCL_A
PORT_MATCH0
PORT_MATCH1
EXTREG_BD_A
UART_RTS_A
UART_CTS_A
UART_RX_A
UART_TX_A
EMIF_BE0B
HVGPIO0
HVGPIO1
HVGPIO2
HVGPIO3
HVGPIO4
HVGPIO5
UDP Motherboard Signal
Default
Optional

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