AAT2505 Analogic Corporation, AAT2505 Datasheet - Page 19

• Manufacturer Part Number: AAT2505
• Manufacturer: Analogic Corporation

Given the total losses, the maximum junction tem-
perature can be derived from the θ
TDFN33-12 package which is 50°C/W.
PCB Layout
The following guidelines should be used to ensure
a proper layout.
1. The input capacitor C2 should connect as
2. The output capacitor and inductor should be
2505.2006.06.1.1
closely as possible to VP and PGND, as shown
in Figure 4.
connected as closely as possible. The connec-
tion of the inductor to the LX pin should also be
as short as possible.
T
J(MAX)
= P
TOTAL
· Θ
JA
+ T
AMB
JA
for the
3. The feedback trace should be separate from
4. The resistance of the trace from the load return
5. For good thermal coupling, PCB vias are
any power trace and connect as closely as
possible to the load point. Sensing along a
high-current load trace will degrade DC load
regulation. If external feedback resistors are
used, they should be placed as closely as pos-
sible to the FB pin. This prevents noise from
being coupled into the high impedance feed-
back node.
to GND should be kept to a minimum. This will
help to minimize any error in DC regulation due
to differences in the potential of the internal sig-
nal ground and the power ground.
required from the pad for the TDFN paddle to the
ground plane. The via diameter should be 0.3mm
to 0.33mm and positioned on a 1.2mm grid.
Converter/Linear Regulator
Dual Channel, Step-Down
19