AAT1275 Analogic Corporation, AAT1275 Datasheet - Page 13

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AAT1275

Manufacturer Part Number
AAT1275
Description
Manufacturer
Analogic Corporation
Datasheet

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Due to the magnitude of the inductor ripple current,
it cannot be neglected when analyzing the R
power dissipation.
been determined, the RMS current during the on
and the off period can be calculated.
1275.2006.12.1.2
P
TOTAL
I
RMS(OFF)
I
RMS(ON)
= I
+ I
RMS(ON)
RMS(OFF)
=
T
J(MAX)
=
D
I
PP
2
(I
2
MAX
P
· ( R
= P
(I
· ( R
=
I
2
PK
I
P
V
I
+ I
Once the ripple current has
2
=
P
V
DS(ON)IN
= I
= I
TOTAL
+ I
DS(ON)IN
=
V
IN(MIN)
PK
O
P
P
1 - D
L · F
PK
· I
- V
- I
+
I
O
· θ
V
· I
V
PP
· D
+ R
O
I
IN(MIN)
+ I
+ R
PP
2
V
S
JA
3
3
+ I
MAX
V
+ T
DS(ON)N
2
DS(ON)P
) · (1 - D
V
2
) · D
AMB
)
+ R
MAX
MAX
DS(ON)
)
DS(ON)
)
Boost Converter with USB Power Switch
R
the high-side synchronous switch, R
low-side synchronous switch, and R
current limit load switch.
PCB Layout Guidelines
The step-up converter performance can be
adversely affected by poor layout. Possible impact
includes high input and output voltage ripple, poor
EMI performance, and reduced operating efficiency.
Every attempt should be made to optimize the lay-
out in order to minimize parasitic PCB effects (stray
resistance, capacitance, inductance) and EMI cou-
pling from the high frequency SW node.
A suggested PCB layout for the AAT1275 is shown
in Figures 1 and 2. The following PCB layout guide-
lines should be considered:
1. Minimize the distance from capacitors C2 and
2. Place the feedback resistor close to the output
3. Minimize the distance between L1 and the
4. Maintain a ground plane and connect to the IC
DS(ON)IN
C3 to the IC. This is especially true for the out-
put capacitor C2, which conducts high ripple cur-
rent associated with the step-up converter out-
put capacitor.
terminals. Route the output pin directly to resis-
tor R2 to maintain good output regulation. R3
should be routed close to the output GND pin
and should not share a significant return path
with output capacitor C2.
switching pin SW; minimize the size of the PCB
area connected to the SW pin.
RTN pin(s), as well as the GND terminals of C1
and C2.
is the input disconnect switch, R
AAT1275
DS(ON)P
DS(ON)
DS(ON)N
is the
is the
13
is

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