AAT1149 Analogic Corporation, AAT1149 Datasheet - Page 15

• Manufacturer Part Number: AAT1149
• Manufacturer: Analogic Corporation

Thermal Calculations
There are three types of losses associated with the
AAT1149 step-down converter: switching losses,
conduction losses, and quiescent current losses.
Conduction losses are associated with the R
characteristics of the power output switching
devices. Switching losses are dominated by the
gate charge of the power output switching devices.
At full load, assuming continuous conduction mode
(CCM), a simplified form of the losses is given by:
I
The term t
down converter switching losses.
For the condition where the step-down converter is
in dropout at 100% duty cycle, the total device dis-
sipation reduces to:
Since R
losses all vary with input voltage, the total losses
should be investigated over the complete input
voltage range.
Given the total losses, the maximum junction tem-
perature can be derived from the θ
SC70JW-8 package which is 160°C/W.
1149.2006.11.1.0
Q
P
TOTAL
is the step-down converter quiescent current.
=
+ (t
DS(ON)
I
sw
P
O
sw
T
2
TOTAL
is used to estimate the full load step-
· F
J(MAX)
· (R
, quiescent current, and switching
S
DS(ON)H
· I
= I
= P
O
O
+ I
2
TOTAL
· R
· V
Q
) · V
DS(ON)H
O
· Θ
+ R
IN
V
JA
IN
DS(ON)L
+ I
+ T
Q
AMB
· V
· [V
IN
JA
IN
- V
for the
DS(ON)
O
])
Layout
The suggested PCB layout for the AAT1149 is
shown in Figures 1, 2, and 3. The following guide-
lines should be used to help ensure a proper layout.
1. The input capacitor (C2) should connect as close-
2. C1 and L1 should be connected as closely as
3. The feedback trace or FB pin (Pin 2) should be
4. The resistance of the trace from the load return
A high density, small footprint layout can be
achieved using an inexpensive, miniature, non-
shielded, high DCR inductor, as shown in Figure 5.
Figure 5: Minimum Footprint Evaluation Board
ly as possible to IN (Pin 3) and PGND (Pins 6-8).
possible. The connection of L1 to the LX pin
should be as short as possible.
separate from any power trace and connect as
closely as possible to the load point. Sensing
along a high-current load trace will degrade DC
load regulation. If external feedback resistors
are used, they should be placed as closely as
possible to the FB pin (Pin 2) to minimize the
length of the high impedance feedback trace.
to the PGND (Pins 6-8) should be kept to a
minimum. This will help to minimize any error in
DC regulation due to differences in the poten-
tial of the internal signal ground and the power
ground.
400mA Step-Down Converter
Using 2.0x1.25x1.0mm Inductor.
3MHz Fast Transient
15