ADP3413 Analog Devices, ADP3413 Datasheet - Page 3

• Manufacturer Part Number: ADP3413
• Description: Dual Bootstrapped MOSFET Driver with Output Disable
• Manufacturer: Analog Devices

ABSOLUTE MAXIMUM RATINGS
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +8 V
BST . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +30 V
BST to SW . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +8 V
SW . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –5.0 V to +25 V
OD, IN . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to VCC + 0.3 V
Operating Ambient Temperature Range . . . . . . . 0°C to 70°C
Operating Junction Temperature Range . . . . . . 0°C to 125°C
θ
θ
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . . 300°C
Pin
1
2
3
4
5
6
7
8
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the ADP3413 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
This is a stress rating only; operation beyond these limits can cause the device to
be permanently damaged. Unless otherwise specified, all voltages are referenced
to PGND.
JA
JC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 155°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40°C/W
Mnemonic
BST
IN
OD
VCC
DRVL
PGND
SW
DRVH
Function
Floating Bootstrap Supply for the Upper MOSFET. A capacitor connected between BST and SW pins
holds this bootstrapped voltage for the high-side MOSFET as it is switched. The capacitor should be
chosen between 100 nF and 1 F.
TTL-level Input Signal, which has primary control of the drive outputs.
Output Disable. When low, this pin disables normal operation, forcing DRVH and DRVL low.
Input Supply. This pin should be bypassed to PGND with ~1 µF ceramic capacitor.
Synchronous Rectifier Drive. Output drive for the lower (synchronous rectifier) MOSFET.
Power Ground. Should be closely connected to the source of the lower MOSFET.
This pin is connected to the buck-switching node, close to the upper MOSFET’s source. It is the floating
return for the upper MOSFET drive signal. It is also used to monitor the switched voltage to prevent turn-
on of the lower MOSFET until the voltage is below ~1 V. Thus, according to operating conditions, the
high-low transition delay is determined at this pin.
Buck Drive. Output drive for the upper (buck) MOSFET.
PIN FUNCTION DESCRIPTIONS
Model
ADP3413JR 0°C to 70°C
Temperature Package
Range
ORDERING GUIDE
PIN CONFIGURATION
VCC
BST
OD
IN
1
2
3
4
(Not To Scale)
ADP3413
Description
8-Lead Standard
Small Outline (SOIC)
TOP VIEW
WARNING!
8
7
6
5
DRVH
SW
PGND
DRVL
ESD SENSITIVE DEVICE
ADP3413
Package
Option
SO-8