ADP3402 Analog Devices, ADP3402 Datasheet - Page 10

• Manufacturer Part Number: ADP3402
• Description: GSM Power Management System
• Manufacturer: Analog Devices

ADP3402
Low Dropout Regulators (LDOs)
The ADP3402 high-performance LDOs are optimized for their
given functions by balancing quiescent current, dropout voltage,
line/load regulation, ripple rejection, and output noise. 2.2 F
tantalum or MLCC ceramic capacitors are recommended for
use with the digital and analog LDOs, and 0.22 F for the
TCXO LDO.
Digital LDO (VCC)
The digital LDO (VCC) supplies all the digital circuitry in the
handset (baseband processor, baseband converter, external
memory, display, etc). The LDO has been optimized for very
low quiescent current (30 A maximum) at light loads as this
LDO is on at all times.
Analog LDO (VCCA)
This LDO has the same features as the digital LDO. It has further-
more been optimized for good low frequency ripple rejection for use
with analog sections in order to reject the ripple coming from the RF
power amplifier. VCCA is rated to 130 mA load which is sufficient
to supply the complete analog section of a baseband converter such
as the AD6421/AD6425, including a 32
TCXO LDO (VTCXO)
The TCXO LDO is intended as a supply for temperature com-
pensated crystal oscillator, which needs its own ultralow noise
supply. The output current is rated to 5 mA for the TCXO LDO.
RTC LDO (VRTC)
The RTC LDO charges a capacitor-type backup coin cell to run
the real-time clock module. It has been targeted to charge elec-
tric double layer capacitors such as the PAS621 from Kanebo.
The PAS621 has a small physical size (6.8 mm diameter) and a
nominal capacity of 0.3 F, giving many hours of backup time.
Figure 17. Connecting VRTC and POWERONIN to the Chipset
Figure 16. Total LDO Load Current vs. Temperature and VBAT
300
250
200
150
100
50
0
20
ADP3402
4-LAYER BOARD
JA
PWRONIN
= 60 C/W
VRTC
0
AMBIENT TEMPERATURE – C
CELL
COIN
20
VRTC
PWRON
40
VBAT = 5.5V
VBAT = 6V
GSM PROCESSOR
MODULE
RTC
earpiece.
VBAT = 5V
60
VBAT = 7V
80
85
–10–
The ADP3402 supplies current both for charging the coin cell and
for the RTC module when the digital supply is off. The nominal
charging voltage is 2.45 V, which ensures long cell life while obtain-
ing in excess of 90% of the nominal capacity. In addition, it features
a very low quiescent current (10 A) since this LDO is running all
the time, even when the handset is switched off. It also has reverse
current protection with low leakage which is needed when the main
battery is removed and the coin cell supplies the RTC module.
Reference Output (REFOUT)
The reference output is a low noise, high precision reference with a
guaranteed accuracy of 1.5% over temperature. The reference can
be fed to the baseband converter, such as the AD6425, improving
the absolute accuracy of the converters from 5% to 1.5%. This
significantly reduces calibration time needed for the baseband
converter during production.
SIM Interface
The SIM interface generates the needed SIM voltage—either 3 V
or 5 V, dependent on SIM type, and also performs the needed
logic level translation. Quiescent current is low, as the SIM card
will be powered all the time. Note that DATAIO and I/O have
integrated pull-up resistors as shown in Figure 18. See Table II for
the control logic of the charge pump output, VSIM.
Power-On/-Off
ADP3402 handles all issues regarding power-on/-off of the hand-
set. It is possible to turn on the ADP3402 in three different ways:
• Pulling PWRONKEY Low
• Pulling PWRONIN High
• CHRON exceeds threshold
Pulling PWRONKEY key low is the normal way of turning on the
handset. This will turn on all the LDOs as long as PWRONKEY is
held low. The microprocessor then starts and pulls PWRONIN
high after which PWRONKEY can be released. PWRONIN going
high will also turn on the handset. This is the case when the alarm
in the RTC module expires.
An external charger can also turn on the phone. The turn-on
threshold and hysteresis can be programmed via external resistors
to allow full flexibility with any external charger and battery chem-
istry. These resistors are referred to as R1 and R2 in Figure 15.
Undervoltage Lockout (ULVO)
The UVLO function in the ADP3402 prevents startup when the
initial voltage of the main battery is below the 3.2 V threshold.
If the battery is this low with no load, there will be little or no
capacity left. When the battery is greater than 3.2 V, as with the
insertion of a fresh battery, the UVLO comparator trips, the
Figure 18. Schematic for Level Translators
RESETIN
DATAIO
CLKIN
VCC
VCC
VCC
ADP3402
LEVEL
LEVEL
SHIFT
SHIFT
VSIM
VSIM
VSIM
RST
CLK
I/O
REV. 0