LM185BYH-2.5 National Semiconductor, LM185BYH-2.5 Datasheet

LM185BYH-2.5

Manufacturer Part Number

LM185BYH-2.5

Description

Micropower Voltage Reference Diode

Manufacturer

National Semiconductor

Datasheet

1.LM185BYH-2.5.pdf (16 pages)

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LM1882 • 54ACT715

LM1882-R • 54ACT715-R Programmable Video Sync

Generator

General Description

The ’ACT715/LM1882 and ’ACT715-R/LM1882-R are 20-pin

TTL-input compatible devices capable of generating Hori-

zontal, Vertical and Composite Sync and Blank signals for

televisions and monitors. All pulse widths are completely de-

finable by the user. The devices are capable of generating

signals for both interlaced and noninterlaced modes of op-

eration. Equalization and serration pulses can be introduced

into the Composite Sync signal when needed.

Four additional signals can also be made available when

Composite Sync or Blank are used. These signals can be

used to generate horizontal or vertical gating pulses, cursor

position or vertical Interrupt signal.

These devices make no assumptions concerning the system

architecture. Line rate and field/frame rate are all a function

of the values programmed into the data registers, the status

The ’ACT715/LM1882 is mask programmed to default to a

Clock Disable state. Bit 10 of the Status Register, Register 0,

defaults to a logic “0”. This facilitates (re)programming be-

fore operation.

The ’ACT715-R/LM1882-R is the same as the ’ACT715/

LM1882 in all respects except that the ’ACT715-R/

Connection Diagrams

TRI-STATE

FACT

™

is a trademark of Fairchild Semiconductor Corporation.

Order Number LM1882CN or LM1882CM

is a registered trademark of National Semiconductor Corporation.

For Default RS-170, Order Number

LM1882-RCN or LM1882-RCM

Pin Assignment for

DIP and SOIC

DS100232

DS100232-1

LM1882-R is mask programmed to default to a Clock En-

abled state. Bit 10 of the Status Register defaults to a logic

“1”. Although completely (re)programmable, the ’ACT715-R/

LM1882-R version is better suited for applications using the

default 14.31818 MHz RS-170 register values. This feature

allows power-up directly into operation, following a single

CLEAR pulse.

Features

n Maximum Input Clock Frequency

n Interlaced and non-interlaced formats available

n Separate or composite horizontal and vertical Sync and

n Complete control of pulse width via register

n All inputs are TTL compatible

n 8 mA drive on all outputs

n Default RS170/NTSC values mask programmed into

n 4 KV minimum ESD immunity

n ’ACT715-R/LM1882-R is mask programmed to default to

Blank signals available

registers

a Clock Enable state for easier start-up into

14.31818 MHz RS170 timing

programming

Pin Assignment

for LCC

130 MHz

December 1998

DS100232-2

www.national.com

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