MCP4725 Microchip Technology, MCP4725 Datasheet - Page 28

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MCP4725

Manufacturer Part Number
MCP4725
Description
12-Bit Digital-to-Analog Converter
Manufacturer
Microchip Technology
Datasheet

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MCP4725
8.2
The user can store the DAC input code (12 bits) and
power-down configuration bits (2 bits) in the internal
non-volatile EEPROM memory using the I
command. The user can also read the EEPROM data
using the I
powered after power is shut down, the device uploads
the EEPROM contents to the DAC register automati-
cally and provides the DAC output immediately. This
feature is very useful in applications where the DAC
device is used to provide set point or calibration data for
other devices in the application system. The DAC will
not lose the important system operational parameters
due to the system power failure incidents. See
Section 5.6 “Non-Volatile EEPROM Memory” for
more details of the non-volatile EEPROM memory.
8.3
The power supply to the device is used for both V
and DAC reference voltage. Any noise induced on the
V
application will require a bypass capacitor in order to
filter out high frequency noise on the V
noise can be induced onto the power supply’s traces or
as a result of changes on the DAC output. The bypass
capacitor helps to minimize the effect of these noise
sources on signal integrity.
example of using two bypass capacitors (a 10 µF
tantalum capacitor and a 0.1 µF ceramic capacitor) in
parallel on the V
placed as close to the V
4 mm).
The power source should be as clean as possible. If the
application circuit has separate digital and analog
power supplies, the V
should reside on the analog plane.
DS22039C-page 28
DD
line can affect on the DAC performance. Typical
Using Non-Volatile EEPROM
Memory
Power Supply Considerations
2
C read command. When the device is first
DD
line. These capacitors should be
DD
and V
DD
pin as possible (within
SS
Figure 8-1
pins of the MCP4725
DD
shows an
line. The
2
C write
DD
8.4
Inductively-coupled AC transients and digital switching
noise from other devices can affect on DAC
performance and DAC output signal integrity. Careful
board layout will minimize these effects. Bench testing
has shown that a multi-layer board utilizing a low-induc-
tance ground plane, isolated inputs, isolated outputs
and proper decoupling are critical to achieving the
performance that the MCP4725 is capable of providing.
Particularly harsh environments may require shielding
of critical signals. Separate digital and analog ground
planes are recommended. In this case, the V
the ground pins of the V
should be terminated to the analog ground plane.
8.5
The MCP4725 is a rail-to-rail output DAC designed to
operate with a V
amplifier is robust enough to drive common, small-sig-
nal loads directly, thus eliminating the cost and size of
an external buffer for most applications.
8.5.1
A common application for the MCP4725 is a
digitally-controlled set point or a calibration of variable
parameters such as sensor offset or bias point.
Example 8-1
Since the MCP4725 is a 12-bit DAC and uses the V
supply as a reference source, it provides a V
resolution per step.
Layout Considerations
Application Examples
DC SET POINT OR CALIBRATION
shows an example of the set point setting.
DD
range of 2.7V to 5.5V. Its output
© 2007 Microchip Technology Inc.
DD
capacitors of the MCP4725
DD
SS
/4096 of
pin and
DD

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