MCP1726 Microchip Technology, MCP1726 Datasheet - Page 18

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MCP1726

Manufacturer Part Number
MCP1726
Description
1A Low Voltage / Low Quiescent Current LDO Regulator
Manufacturer
Microchip Technology
Datasheet

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MCP1726
5.0
5.1
The MCP1726 is used for applications that require high
LDO output current and a power good output.
FIGURE 5-1:
5.1.1
5.2
5.2.1
The internal power dissipation within the MCP1726 is a
function of input voltage, output voltage, output current
and quiescent current. The following equation can be
used to calculate the internal power dissipation for the
LDO.
EQUATION 5-1:
DS21936B-page 18
Off
Input Voltage Range = 3.3V ± 10%
V
V
IN
OUT(MIN)
V
P
On
= 3.3V
IN(MAX)
LDO
P
C
10 µF
LDO
Package Type = 3X3DFN8
V
1
APPLICATION
CIRCUITS/ISSUES
Typical Application
V
Power Calculations
V
IN
=
IN
OUT
APPLICATION CONDITIONS
POWER DISSIPATION
= LDO Pass device internal power
= Maximum input voltage
= LDO minimum output voltage
maximum = 3.63V
minimum = 2.97V
V
dissipation
IN MAX
1
2
3
4
typical = 2.5V
MCP1726-2.5
I
V
V
SHDN
GND PWRGD
OUT
IN
IN
Typical Application Circuit.
= 1.0A maximum
C
DELAY
V
V
V
OUT
OUT
OUT MIN
8
7
6
5
1000 pF
C
10k
3
V
R
OUT
I
OUT MAX
1
= 2.5V @ 1A
PWRGD
C
10 µF
2
In addition to the LDO pass element power dissipation,
there is power dissipation within the MCP1726 as a
result of quiescent or ground current. The power dissi-
pation as a result of the ground current can be
calculated using the following equation:
EQUATION 5-2:
The total power dissipated within the MCP1726 is the
sum of the power dissipated in the LDO pass device
and the P(I
tion, the typical I
Operating at a maximum of 3.63V results in a power
dissipation of 0.51 milli-Watts. For most applications,
this is small compared to the LDO pass device power
dissipation and can be neglected.
The maximum continuous operating junction tempera-
ture specified for the MCP1726 is +125
the internal junction temperature of the MCP1726, the
total internal power dissipation is multiplied by the ther-
mal resistance from junction to ambient (R
device. The thermal resistance from junction to ambi-
ent for the 3X3DFN package is estimated at 41
EQUATION 5-3:
V
P
IN(MAX)
T
P
I(GND)
T
J(MAX)
TOTAL
AMAX
R
I
VIN
JA
T
GND
J MAX
= Power dissipation due to the
= Maximum input voltage
= Current flowing in the V
= Maximum continuous junction
= Total device power dissipation
= Thermal resistance from junction
= Maximum ambient temperature
P
quiescent current of the LDO
no LDO output current (LDO
quiescent current)
) term. Because of the CMOS construc-
I GND
temperature
to ambient
GND
=
P
TOTAL
=
for the MCP1726 is 140 µA.
© 2005 Microchip Technology Inc.
V
IN MAX
R
JA
+
I
VIN
T
IN
°
AMAX
C
pin with
.
To estimate
JA
) of the
°
C/W.

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