MCP1725 Microchip Technology, MCP1725 Datasheet - Page 20

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MCP1725

Manufacturer Part Number
MCP1725
Description
Low Quiescent Current LDO Regulator
Manufacturer
Microchip Technology
Datasheet

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MCP1725
5.0
5.1
The MCP1725 is used for applications that require high
LDO output current and a power good output.
FIGURE 5-1:
5.1.1
5.2
5.2.1
The internal power dissipation within the MCP1725 is a
function of input voltage, output voltage, output current
and quiescent current.
calculate the internal power dissipation for the LDO.
EQUATION 5-1:
DS22026A-page 20
Off
V
Where:
IN
Input Voltage Range
P
On
= 3.3V
V
LDO
Temperature Rise
V
OUT(MIN)
C
10 µF
IN(MAX)
V
1
APPLICATION CIRCUITS/
ISSUES
Typical Application
Power Calculations
Package Type
DROPOUT (max)
P
P
V
V
=
V
DISS
LDO
APPLICATION CONDITIONS
OUT
POWER DISSIPATION
IN
IN
(
V
maximum
minimum
IN MAX )
1
2
3
4
(typical)
(typical)
MCP1725-2.5
(
= LDO Pass device internal
= Maximum input voltage
= LDO minimum output voltage
V
V
SHDN
GND PWRGD
IN
IN
I
OUT
power dissipation
Typical Application Circuit.
)
C
Sense
Equation 5-1
DELAY
V
V
OUT
OUT MIN
=
=
=
=
=
=
=
=
=
8
7
6
5
(
3.135V
2x3 DFN8
3.3V ± 5%
3.465V
0.350V
2.5V
0.5A maximum
0.4W
30.4
)
1000 pF
C
) I
10kΩ
×
3
°
V
can be used to
C
R
OUT
OUT MAX )
1
= 2.5V @ 0.5A
PWRGD
(
C
10 µF
)
2
In addition to the LDO pass element power dissipation,
there is power dissipation within the MCP1725 as a
result of quiescent or ground current. The power
dissipation as a result of the ground current can be
calculated using the following equation:
EQUATION 5-2:
The total power dissipated within the MCP1725 is the
sum of the power dissipated in the LDO pass device
and the P(I
construction, the typical I
120 µA. Operating at 3.465V results in a power
dissipation of 0.42 milli-Watts. For most applications,
this is small compared to the LDO pass device power
dissipation and can be neglected.
The
temperature specified for the MCP1725 is +125
estimate the internal junction temperature of the
MCP1725, the total internal power dissipation is
multiplied by the thermal resistance from junction to
ambient (Rθ
from junction to ambient for the 2x3 DFN package is
estimated at 76
EQUATION 5-3:
Where:
T
P
T
J(MAX)
TOTAL
V
AMAX
maximum
IN(MAX)
P
JA
T
I(GND
J MAX
I
VIN
(
JA
= Maximum continuous junction
= Total device power dissipation
= Thermal resistance from junction to
= Maximum ambient temperature
GND
P
) of the device. The thermal resistance
I GND
°
temperature
ambient
(
C/W.
)
= Power dissipation due to the
= Maximum input voltage
= Current flowing in the V
) term. Because of the CMOS
=
continuous
)
P
quiescent current of the LDO
with no LDO output current
(LDO quiescent current)
TOTAL
=
© 2006 Microchip Technology Inc.
V
IN MAX
GND
(
×
for the MCP1725 is
)
JA
operating
×
+
I
VIN
T
AMAX
IN
junction
pin
°
C
.
To

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