AAT3242 AAT, AAT3242 Datasheet - Page 2

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AAT3242

Manufacturer Part Number
AAT3242
Description
Dual CMOS LDO Linear Regulator
Manufacturer
AAT
Datasheet
Pin Descriptions
Pin Configuration
2
2, 3, 8, 9
Pin #
10
12
11
1
4
5
6
7
Symbol
POKA
OUTB
POKB
OUTA
GND
ENA
ENB
INB
INA
Function
Enable Regulator A pin; this pin should not be left floating. When pulled
low, the PMOS pass transistor turns off and the device enters shutdown
mode, consuming less than 1µA.
Ground connection pins.
Power OK pin with open drain output. It is pulled low when the OUTA pin is
below the 10% regulation window.
Low current (150mA) regulator output pin; should be decoupled with a
2.2µF or greater output low-ESR ceramic capacitor.
Input voltage pin for Regulator B; should be decoupled with 1µF or greater
capacitor.
Enable Regulator B; this pin should not be left floating. When pulled low, the
PMOS pass transistor turns off and the device enters shutdown mode, con-
suming less than 1µA.
Power OK pin with open drain output. It is pulled low when the OUTB pin is
below the 10% regulation window.
High-current (300mA) regulator output pin; should be decoupled with a
2.2µF or greater output low-ESR ceramic capacitor.
Input voltage pin for Regulator A; should be decoupled with 1µF or greater
capacitor.
POKA
OUTB
ENA
GND
GND
300mA/150mA Dual CMOS LDO Linear Regulator
INB
1
2
3
4
5
6
TSOPJW-12
(Top View)
12
11
10
9
8
7
INA
OUTA
POKB
GND
GND
ENB
AAT3242
3242.2006.04.1.10

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