S3063 AMCC (Applied Micro Circuits Corp), S3063 Datasheet - Page 16

• Manufacturer Part Number: S3063
• Description: Sonet/sdh/atm Oc-48 Differential 16:1 Transmitter
• Manufacturer: AMCC (Applied Micro Circuits Corp)

RECEIVER FRAMING
Figure 10 shows a typical reframe sequence in which a
byte realignment is made. The frame and byte bound-
ary detection is enabled by the rising edge of OOF.
Both boundaries are recognized upon receipt of the
first A2 byte. The third A2 byte is the first data byte to
be reported with the correct byte alignment on the out-
going data bus (POUTP/N[15:0]). Concurrently, the
frame pulse is set high for one POCLK cycle.
16
S3064
Figure 10. Frame and Byte Detection
1. Range of input to output delay can be 1.5 to 2.5 POCLK cycles.
RECOVERED
POUT[15:0]
SERDATI
REFCLK
CLOCK/
POCLK
OOF
FP
A1
SONET/SDH/ATM OC-48 DIFFERENTIAL 1:16 RECEIVER
A1
A1
Invalid Data
The frame and byte boundary detection block is acti-
vated by the rising edge of OOF, and stays active until
the first FP pulse.
Figure 11 shows the frame and byte boundary detection
activation by a rising edge of OOF, and deactivated by
the first FP pulse.
Figure 12 shows the frame and byte boundary detec-
tion activation by a rising edge of OOF, and deacti-
vated by the FRAMEN input.
A1, A1
A2
A1, A1
A2
A1, A1
A2
December 6, 1999 / Revision NC
A2, A2
A2
A2, A2
Valid Data
Note 1
A2