GS1532 Gennum Corporation, GS1532 Datasheet - Page 8

• Manufacturer Part Number: GS1532
• Description: Serializer For HD-SDI, Sd-sdi & DVB-ASI. 3.3/1.8V Supply.
• Manufacturer: Gennum Corporation

1.2 PIN DESCRIPTIONS (Continued)
GENNUM CORPORATION
NUMBER
PIN
29
30
32
33
34
CORE_GND
SCLK_TCK
SDIN_TDI
BLANK
NAME
F
(Continued)
(Continued)
(Continued)
with SCLK_TCK
Synchronous
Synchronous
Synchronous
Synchronous
Synchronous
with PCLK
with PCLK
TIMING
Non
Non
Input Power
TYPE
Input
Input
Input
Input
8
CONTROL SIGNAL INPUT
Signal levels are LVCMOS / LVTTL compatible.
Serial Data In / Test Data In
When JTAG/HOST = HIGH, this pin is JTAG TDI
When JTAG/HOST = LOW, this pin is used to write address and
configuration data words into the device.
CONTROL SIGNAL INPUT
Signal levels are LVCMOS / LVTTL compatible.
Serial Data Clock / Test Clock
When JTAG/HOST = HIGH, this pin is JTAG TCK
When JTAG/HOST = LOW, the host interface address and data is
shifted into / out of the device synchronously with this clock.
CONTROL SIGNAL INPUT
Signal levels are LVCMOS/LVTTL compatible.
When BLANK is LOW, the GS1532 sets the Luma and Chroma
input data to their appropriate blanking levels.
When BLANK is HIGH, the Luma and Chroma data pass through
this device unaltered.
GND connection - Digital logic
CONTROL SIGNAL INPUT
Signal levels are LVCMOS/LVTTL compatible.
The F signal is used to indicate the ODD/EVEN field of the video
signal.
The F signal will go HIGH for the entire period of field 2 as
indicated by the F bit in the received TRS signals.
The F signal will be LOW for all lines in field 1 and for all lines in
progressive scan systems.
The GS1532 uses the F input signal for internal timing generation
(when DETECT_TRS = LOW) and will set the F bit in all outgoing
TRS signals for the entire period that the F input signal is HIGH.
The F input is ignored when DETECT_TRS is HIGH.
DESCRIPTION
21498 - 0