GS1500 Gennum Corporation, GS1500 Datasheet - Page 6

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GS1500

Manufacturer Part Number
GS1500
Description
Hd-linx (tm) THDTV Serial Digital Deformatter With Anc Fifos
Manufacturer
Gennum Corporation
Datasheet
1.2 PIN DESCRIPTIONS
GENNUM CORPORATION
PIN NUMBER
28, 29, 30, 31
42, 41, 40, 39
56, 55, 54, 53
52, 49, 48,
45, 44, 43,
64, 63, 62,
61, 60, 57,
27
32
33
34
35
36
(CHROMA channel)
LINE_CRC_ERR_C
LINE_CRC_ERR_Y
DATA_OUT[19:10]
(LUMA channel)
DATA_OUT[9:0]
ANC_DATA_C
VD_STD[3:0]
(Continued)
(Continued)
(Continued)
(Continued)
FIFO_L
NAME
OEN
TN
Synchronous
Synchronous
Synchronous
Synchronous
Synchronous
Synchronous
Synchronous
wrt PCLK_IN
wrt PCLK_IN
wrt PCLK_IN
wrt PCLK_IN
wrt PCLK_IN
synchronous
wrt PCLK_IN
wrt PCLK_IN
TIMING
Non-
Output
Output
Output
Output
Output
Output
Output
TYPE
TEST
Input
6
Control Signal Output. This signal indicates the position of the
embedded ANC data in the outgoing CHROMA (DATA_OUT[9:0])
data stream. ANC_DATA_C goes high for the entire time that an
ANC_DATA packet is present in the CHROMA (DATA_OUT[9:0])
data stream whether it be in the active video area or the HANC
area. Refer to Fig. 17 for timing of ANC_DATA_C relative to
CHROMA (DATA_OUT[9:0]). During detection of ANC data, any
errors in the data count (DC) packet will consequently cause
errors in the duration of the flags. Bit errors in an ANC header will
prevent the packet from being detected.
Control Signal Output. VD_STD[3:0] indicates which input video
standard the device has detected. The GS1500 will indicate all of
the formats in SMPTE292M (see Table 3) plus it will indicate an
unknown interlace or progressive scan format.
Status Signal Output. Indicates a difference in the calculated
versus embedded CRC in the CHROMA channel. When
LINE_CRC_ERR_C is high, it indicates that the GS1500 has
detected a difference between the line based CRCs it calculates
for the CHROMA channel and the line based CRCs embedded
within the CHROMA channel. When LINE_CRC_ERR_C is low, the
embedded and calculated CRC's match. Refer to Fig. 19 for
timing information of LINE_CRC_ERR_C.
Status Signal Output. Indicates a difference in the calculated
versus embedded CRC in the LUMA channel. When
LINE_CRC_ERR_Y is high, it indicates that the GS1500 has
detected a difference between the line based CRCs it calculates
for the LUMA channel and the line based CRCs embedded within
the LUMA channel. When LINE_CRC_ERR_Y is low, the
embedded and calculated CRC's match. Refer to Fig. 19 for
timing information of LINE_CRC_ERR_Y.
Control Signal Output. Used to control an external FIFO(s). FIFO_L
is normally high, but is set low for the EAV or SAV word depending
on the state of F_E/S. Refer to Fig. 4 for timing information of
FIFO_L relative to LUMA (DATA_OUT[19:10]) and CHROMA
(DATA_OUT[9:0]).
Test Pin. Used for test purposes only. This pin must be connected
to V
Control Signal Input. Used to enable the DATA_OUT[19:0] output
bus or set it in a high Z state. When OEN is low, the LUMA
(DATA_OUT[19:10]) and CHROMA (DATA_OUT [9:0]) busses are
enabled. When OEN is high, these busses are in a high Z state.
CHROMA Output Data Bus. DATA_OUT [9] is CHROMA_OUT[9]
which is the MSB of the CHROMA output signal (pin 52).
DATA_OUT [0] is CHROMA_OUT[0] which is the LSB of the
CHROMA output signal (pin 39).
LUMA Output Data Bus. DATA_OUT [19] is LUMA_OUT[9] which
is the MSB of the LUMA output signal. (pin 64) DATA_OUT [10] is
LUMA_OUT[0] which is the LSB of the LUMA output signal (pin
53).
DD
for normal operation
DESCRIPTION
52233 - 3

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