MB2146-301A Fujitsu Microelectronics, Inc., MB2146-301A Datasheet - Page 38

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MB2146-301A

Manufacturer Part Number
MB2146-301A
Description
8-bit Microcontrollers
Manufacturer
Fujitsu Microelectronics, Inc.
Datasheet
38
MB95130MB Series
(2) Source Clock/Machine Clock
*1 : Clock before setting division due to machine clock division ratio selection bit (SYCC : DIV1 and DIV0) . This
*
Source clock
cycle time*
setting division)
Source clock
frequency
Machine clock
cycle time*
instruction
execution time)
Machine clock
frequency
2
(Clock before
(Minimum
• Outline of clock generation block
: Operation clock of the microcontroller. Machine clock can be selected as follows.
Parameter
source clock is divided by the machine clock division ratio selection bit (SYCC : DIV1 and DIV0) , and it
becomes the machine clock. Further, the source clock can be selected as follows.
• Main clock divided by 2
• PLL multiplication of main clock (select from 1, 2, 2.5, 4 multiplication)
• Sub clock divided by 2
• PLL multiplication of sub clock (select from 2, 3, 4 multiplication)
• Source clock (no division)
• Source clock divided by 4
• Source clock divided by 8
• Source clock divided by 16
(main oscillation)
(sub oscillation)
1
2
F
F
CH
CL
Symbol
t
t
F
F
F
F
MCLK
SCLK
MPL
SPL
MP
SP
name
Divided by 2
Divided by 2
Pin
Main PLL
Sub PLL
× 2.5
× 1
× 2
× 4
× 2
× 3
× 4
16.384
0.031
1.024
61.5
0.50
61.5
Min
7.6
7.6
Value
Typ
(V
(SYCC: SCS1, SCS0)
CC
Clock mode select bit
= 5.0 V ± 10%, AV
131.072 kHz When using sub clock
131.072 kHz When using sub clock
16.250
32000
16.25
976.5
2000
Max
61.0
(source clock)
SCLK
MHz When using main clock
MHz When using main clock
Unit
ns
µs
ns
µs
When using main clock
Min : F
Max : F
When using sub clock
Min : F
Max : F
When using main clock
Min : F
Max : F
When using sub clock
Min : F
Max : F
SS
= V
Division
× 1/16
circuit
× 1/4
× 1/8
CH
× 1
SS
CL
SP
SPL
CH
CL
SP
SPL
= 8.125 MHz, PLL multiplied by 2
= 0.0 V, T
= 32 kHz, PLL multiplied by 4
= 16.25 MHz, no division
= 32 kHz, divided by 2
= 0.5 MHz, divided by 16
= 1 MHz, divided by 2
= 131 kHz, no division
= 16 kHz, divided by 16
Remarks
A
(machine clock)
= − 40 °C to + 85 °C)
MCLK

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