APL5910 Anpec Electronics Coropration, APL5910 Datasheet

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APL5910

Manufacturer Part Number
APL5910
Description
1A, Ultra Low Dropout (0.12v Typical) Linear Regulator
Manufacturer
Anpec Electronics Coropration
Datasheet

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APL5910
Features
Applications
Pin Configuration
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and
advise customers to obtain the latest version of relevant information to verify before placing orders.
Copyright
Rev. A.2 - Aug., 2008
VCNTL
Ultra Low Dropout
- 0.12V (Typical) at 1A Output Current
0.8V Reference Voltage
High Output Accuracy
- 1.5% over Line, Load, and Temperature Range
Fast Transient Response
Adjustable Output Voltage
Power-On-Reset Monitoring on Both VCNTL and
VIN Pins
Internal Soft-Start
Current-Limit and Short Current-Limit Protections
Thermal Shutdown with Hysteresis
Open-Drain VOUT Voltage Indicator (POK)
Low Shutdown Quiescent Current (< 30 A )
Shutdown/Enable Control Function
Simple SOP-8P Package with Exposed Pad
Lead Free and Green Devices Available
(RoHS Compliant)
Motherboards, VGA Cards
Notebook PCs
Add-in Cards
POK
= Exposed Pad
VIN
(connected to ground plane for better heat dissipation)
EN
ANPEC Electronics Corp.
1
2
3
4
SOP-8P (Top View)
1A, Ultra Low Dropout (0.12V Typical) Linear Regulator
7
5
8
6
FB
VOUT
NC
GND
1
General Description
The APL5910 is a 1A ultra low dropout linear regulator.
The IC needs two supply voltages, one is a control volt-
age (V
supply voltage (V
dissipation and provide extremely low dropout voltage.
The APL5910 integrates many functions. A Power-On-
Reset (POR) circuit monitors both supply voltages on
VCNTL and VIN pins to prevent erroneous operations.
The functions of thermal shutdown and current-limit pro-
tect the device against thermal and current over-loads. A
POK indicates that the output voltage status with a delay
time set internally. It can control other converter for power
sequence. The APL5910 can be enabled by other power
systems. Pulling and holding the EN voltage below 0.4V
shuts off the output.
The APL5910 is available in a SOP-8P package which
features small size as SOP-8 and an Exposed Pad to
reduce the junction-to-case resistance to extend power
range of applications.
Simplified Application Circuit
Enable
POK
CNTL
EN
) for the control circuitry, the other is a main
IN
POK
EN
) for power conversion, to reduce power
APL5910
VCNTL
GND
VOUT
VIN
FB
Optional
www.anpec.com.tw
V
V
V
OUT
IN
CNTL

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APL5910 Summary of contents

Page 1

... Copyright ANPEC Electronics Corp. Rev. A.2 - Aug., 2008 General Description The APL5910 ultra low dropout linear regulator. The IC needs two supply voltages, one is a control volt- age (V CNTL supply voltage (V dissipation and provide extremely low dropout voltage ...

Page 2

... Ordering and Marking Information APL5910 APL5910 APL5910 KA : XXXXX Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020C for MSL classification at lead-free peak reflow temperature. ANPEC defines “ ...

Page 3

... C V =4.5V, J CNTL V =1.8V OUT I =1A T =-40~125 OUT = =1.2V OUT T =-40~125 J 3 Range 3.0 ~ 5.5 1.0 ~ 5.5 0 DROP 24k 8 ~ 600 OUT 8 ~ 900 OUT 8 ~ 1100 OUT 0 ~ 200 - -40 ~ 125 =1.5V, V =1.2V, and OUT A APL5910 Min. Typ. Max. - 1.0 1 2.5 2.7 2.9 - 0.4 - 0.8 0.9 1.0 - 0.5 - 0.792 0.8 0.808 -1.5 - +1.5 - 0.06 0.15 -0.15 - +0. -100 - 100 - 0. ...

Page 4

... -40 ~ 125 <0.2V FB From beginning of soft-start rising J rising EN EN=GND V rising FB POK sinks 5mA V <falling POK voltage threshold FB From rising edge of the FB THPOK V POK FUNCTION 4 =1.5V, V =1.2V, and OUT A APL5910 Min. Typ. Max. 1.7 2.1 2.5 1 0.4 - 0.6 1 170 - - 50 - 0.5 0.8 1 0.3 0 ...

Page 5

... Enable and Soft-Start POR V REF 0.8V Error Amplifier Dela y Current-Limit 90% Short Current-Limit V REF FB C CNTL 1 F VCNTL 3 1 VIN POK 6 VOUT APL5910 GND R2 24k 10 F: GRM31MR60J106KE19 Murata 5 VCNTL Power- On-Reset (POR) VIN VOUT and GND V CNTL (+5V is preferred +1. ...

Page 6

... APL5910 Typical Operating Characteristics Current-Limit vs. Junction Temperature 2 1.2V OUT 2.4 2.3 V CNTL 2.2 2.1 2.0 1 3.3V 1.8 CNTL 1.7 1.6 1.5 1.4 -50 - Junction Temperature ( Dropout Voltage vs. Output Current 180 CNTL 160 V = 1.2V OUT 140 120 T = 25° 100 0.25 0.5 Output Current, I Dropout Voltage vs. Output Current 200 CNTL ...

Page 7

... APL5910 Typical Operating Characteristics (Cont.) Dropout Voltage vs. Output Current 220 200 CNTL V = 2.5V OUT 180 160 140 T 120 J 100 0.5 0 0.25 Output Current, I VCNTL Power Supply Rejection Ratio (PSRR =4.6~5.4V CNTL V =1.5V - =1.2V OUT I =1A -20 OUT OUT -30 -40 ...

Page 8

... APL5910 Operating Waveforms Refer to the typical application circuit. The test condition is V Power On V CNTL OUT 3 V POK =1.2 OUT IN L CH1 5V/Div, DC CNTL CH2 1V/Div CH3 1V/Div, DC OUT CH4 5V/Div, DC POK TIME: 5ms/Div Load Transient Response ...

Page 9

... APL5910 Operating Waveforms (Cont.) Refer to the typical application circuit. The test condition is V Shutdown OUT 2 V POK 3 I OUT =1.2 OUT IN L CH1 5V/Div CH2 1V/Div, DC OUT CH3 5V/Div, DC POK CH4 1.0A/Div, DC OUT TIME: 10 s/Div Copyright ANPEC Electronics Corp ...

Page 10

... C. Enable Control The APL5910 has a dedicated enable pin (EN). A logic low signal applied to this pin shuts down the output. Fol- lowing a shutdown, a logic high signal re-enables the output through initiation of a new soft-start cycle. When left open, this pin is pulled internal current source (5 A typical) to enable normal operation. It’ ...

Page 11

... APL5910 and help the device to minimize the variations of output voltage for good transient response. For the applications with large stepping load current, the low-ESR bulk capacitors are normally recommended ...

Page 12

... GND pin must be connected to the ground plane of the load. 6. Large current paths, shown by bold lines on the fig- ure 1, must have wide tracks. 7. Place the R1, R2, and C1 near the APL5910 as close as possible to avoid noise coupling. 8. Connect the ground of the R2 to the GND pin by using a dedicated track. ...

Page 13

... APL5910 Package Information SOP- THERMAL PAD Note : 1. Follow JEDEC MS-012 BA. Copyright ANPEC Electronics Corp. Rev. A.2 - Aug., 2008 b SOP-8P MILLIMETERS MIN. MAX. 1.60 0.15 0.00 1.25 0.31 0.51 0.17 0.25 4.80 5.00 2.25 3.50 5.80 6.20 3.80 4.00 2.00 3.00 1.27 BSC 0.25 0.50 0.40 1. Dimension "D" does not include mold flash, protrusions or gate burrs ...

Page 14

... APL5910 Carrier Tape & Reel Dimensions K0 SECTION A-A Application A H 330.0± 2.00 50 MIN. SOP 4.0± 0.10 8.0± 0.10 Devices Per Unit Package Type SOP- 8P Copyright ANPEC Electronics Corp. Rev. A.2 - Aug., 2008 P0 P2 OD0 A0 B SECTION B 12.4+2.00 13.0+0.50 1.5 MIN. 20.2 MIN. 12.0± 0.30 1.75± 0.10 -0.00 -0. 1.5+0.10 2.0± 0.05 1 ...

Page 15

... APL5910 Taping Direction Information SOP-8P Reflow Condition (IR/Convection or VPR Reflow Tsmax Tsmin 25 Reliability Test Program Test item SOLDERABILITY HOLT PCT TST ESD Latch-Up Copyright ANPEC Electronics Corp. Rev. A.2 - Aug., 2008 USER DIRECTION OF FEED tp Ramp-up Ramp-down ts Preheat Peak ...

Page 16

... APL5910 Classification Reflow Profiles Profile Feature Average ramp-up rate ( Preheat - Temperature Min (Tsmin) - Temperature Max (Tsmax) - Time (min to max) (ts) Time maintained above: - Temperature ( Time ( Peak/Classification Temperature (Tp) Time within actual Peak Temperature (tp) Ramp-down Rate Time Peak Temperature Notes: All temperatures refer to topside of the package. Measured on the body surface. Table 1. SnPb Eutectic Process – ...

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