MB15F07SL Fujitsu Media Devices, MB15F07SL Datasheet - Page 12

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MB15F07SL

Manufacturer Part Number
MB15F07SL
Description
Dual Serial Input PLL Frequency Synthesizer
Manufacturer
Fujitsu Media Devices
Datasheet

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12
MB15F07SL
SERIAL DATA INPUT TIMING
Data
Clock
LE
On rising edge of the clock, one bit of the data is transfered into the shift register.
Note: LE should be “L” when the data is transferred into the shift register.
Parameter
t
t
t
t
1
2
3
4
t
7
Min.
t
20
20
30
30
1
MSB
Typ.
Max.
1st data
t
2
Unit
ns
ns
ns
ns
Parameter
t
t
t
t
5
6
7
3
Control bit
Min.
LSB
100
100
20
t
4
Invalid data
Typ.
t
5
Max.
t
6
2nd data
Unit
ns
ns
ns

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