M25PX64-VMF6TF Numonyx, M25PX64-VMF6TF Datasheet - Page 29

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M25PX64-VMF6TF

Manufacturer Part Number
M25PX64-VMF6TF
Description
64-mbit, Dual I/o, 4-kbyte Subsector Erase, Serial Flash Memory With 75 Mhz Spi Bus Interface
Manufacturer
Numonyx
Datasheet
M25PX64
6.2
Write disable (WRDI)
The write disable (WRDI) instruction
The write disable (WRDI) instruction is entered by driving Chip Select (S) Low, sending the
instruction code, and then driving Chip Select (S) High.
The write enable latch (WEL) bit is reset under the following conditions:
Figure 9.
Power-up
Write disable (WRDI) instruction completion
Write status register (WRSR) instruction completion
Write to lock register (WRLR) instruction completion
Page program (PP) instruction completion
Dual input fast program (DIFP) instruction completion
Program OTP (POTP) instruction completion
Subsector erase (SSE) instruction completion
Sector erase (SE) instruction completion
Bulk erase (BE) instruction completion
Write disable (WRDI) instruction sequence
S
C
DQ0
DQ1
High Impedance
(Figure
0
1
2
Instruction
9) resets the write enable latch (WEL) bit.
3
4
5
6
7
AI13732
Instructions
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