AP7115 Diodes, Inc., AP7115 Datasheet - Page 8
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AP7115
Manufacturer Part Number
AP7115
Description
150ma Low Dropout Linear Regulator With Shutdown
Manufacturer
Diodes, Inc.
Datasheet
1.AP7115.pdf
(10 pages)
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Application Note
An 1uF input capacitor is required between the AP7115 input pin
and GND.
There are no requirements for the ESR on input capacitor, but
tolerance and temperature coefficient must be considered.
The AP7115 can work with very small ceramic output capacitors
(1uF or greater). Higher capacitance values help to improve
transient. The output capacitor’s ESR is critical because it from a
zero to provide phase lead which is required for loop stability.
Figure below is Cout ESR vs. Load Current.
0.1uF bypass capacitor Between BP pin and GND can reduces
output voltage noise.
The AP7115 is shutdown by pulling the EN pin low, and turned on
by driving the input high. If the shutdown feature is not required,
the EN pin should be tied to VIN to keep the regulator on at all
times.
V
The AP7115 monitors and controls the PMOS’ gate voltage,
limiting the output current to 250mA(typ.). The output can be
shorted to ground for an indefinite period of time without
damaging the part.
AP7115 Rev. 6
DROPOUT
Input Capacitor
Output Capacitor
Band-Gap Bypass Capacitor
Shutdown Input Operation
Dropout Voltage
Current Limit
=V
IN
-V
OU
T=R
DS(ON)
×I
OUT
150mA LOW DROPOUT LINEAR REGULATOR WITH
www.diodes.com
8 of 10
Optimum performance can only be achieved when the device is
mounted on a PC board according to the diagram below:
Thermal Shutdown Protection limits power dissipation in AP7115.
When the operation junction temperature exceeds 155°C, the
Over Temperature Protection circuit starts the thermal shutdown
function and turns the pass element off. The pass element turn
on again after the junction temperature cools by 30°C. For
continuous operation, do not exceed absolute maximum
operation junction temperature 125°C. The power dissipation
definition in device is:
P
The maximum power dissipation depends on the thermal
resistance of IC package, PCB layout, the rate of surroundings
airflow and temperature difference between junction to ambient.
The maximum power dissipation can be calculated by the
following formula:
P
Where T
125°C, T
to ambient thermal resistance.
D
D(MAX)
= (V
PCB Layout
Thermal Considerations
A
IN
= ( T
J(MAX)
is the ambient temperature and the θ
− V
J(MAX)
is the maximum operation junction temperature
OU
T) x I
- T
OUT
A
) / θ
+ V
JA
IN
x I
Q
©
AP7115
SHUTDOWN
Diodes Incorporated
JA
is the junction
MAY 2008