FX629 Consumer Microcircuits Limited, FX629 Datasheet

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FX629

Manufacturer Part Number
FX629
Description
Delta Modulation Codec
Manufacturer
Consumer Microcircuits Limited
Datasheet
Features/Applications
Brief Description
The FX629 is an LSI circuit designed as a
*Continuously Variable Slope Delta Codec and
is intended for use in military communications
systems.
Designed to meet Mil-Std-188-113 with
external components, the device is suitable for
applications in military Delta Multiplexers,
switches and phones.
Encoder input and decoder output filters are
incorporated on-chip. Sampling clock rates can
be programmed to 16, 32 or 64 k bits/second
from an internal clock generator or may be
externally applied in the range 8 to 64 k bits/
second. Sampling clock frequencies are output
for the synchronization of external circuits.
Fig.1 Internal Block Diagram
Designed to Meet Mil-Std-188-113
Military Communications
Delta MUX, Switch and Phone
Applications
Single-Chip Full-Duplex Codec
On-Chip Input and Output Filters
ENCODER INPUT
V
DATA ENABLE
ENCODER FORCE IDLE
V
XTAL/CLOCK
XTAL
ENCODER DATA CLOCK
DECODER DATA CLOCK
V
MODE 1
MODE 2
ALGORITHM
POWERSAVE
DECODER INPUT
DECODER FORCE IDLE
BIAS
DD
SS
f
CLOCK MODE
3
f
LOGIC
1
DEMOD
CML Semiconductor Products
PRODUCT INFORMATION
FX629
SAMPLING RATE
f
0
CONTROL
GENERATORS
CLOCK RATE
3 or 4-BIT
Delta Modulation Codec
The encoder has an enable function for use in
multiplexer applications.
Encoder and Decoder forced idle facilities are
provided, forcing a 10101010..... pattern in
encode and a V
The companding circuits may be operated with
a pin-selected 3 or 4-bit algorithm.
The powersave facility puts the device into the
standby mode thereby reducing current
consumption when not operating.
A reference 1.024MHz oscillator uses an
external clock pulse or Xtal input.
The FX629 is a low-power, 5 volt CMOS
device and is available in 22-pin cerdip DIL
package.
f
f
2
1
Programmable Sampling Clocks
3 or 4-bit Compand Algorithm
Forced Idle Facility
Powersave Facility
Single 5V CMOS Process
Full-Duplex CVSD* Codec
MOD
ENCODER OUTPUT
DECODER OUTPUT
DD
Publication D/629/2 July 1994
/2 bias in decode.
Provisional Issue
FX629

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FX629 Summary of contents

Page 1

... DECODER INPUT DEMOD DECODER FORCE IDLE Fig.1 Internal Block Diagram Brief Description The FX629 is an LSI circuit designed as a *Continuously Variable Slope Delta Codec and is intended for use in military communications systems. Designed to meet Mil-Std-188-113 with external components, the device is suitable for applications in military Delta Multiplexers, switches and phones ...

Page 2

... Pin Number Function FX629J 1 Xtal/Clock : Input to the clock oscillator inverter. A 1.024MHz Xtal input or externally derived clock is injected here. See Clock Mode pins and Figure 3. 2 Xtal : Output of clock oscillator inverter. Xtal circuitry shown is in accordance with CML application note D/XT/1 April 1986. ...

Page 3

... Pin Number Function FX629J No connection 12 Decoder Output : The recovered analogue signal is output at this pin the buffered 13 output of a bandpass filter and requires external components. During "Powersave" this output is o/c. No connection 14 Powersave : A logical '0' at this pin puts most parts of the codec into a quiescent non- 15 operational state ...

Page 4

... Codec Integration FX629 PARAMETERS MEASURED HERE ANALOGUE INPUT SYSTEM INTERFACE INPUT (BALUN & BUFFER) Fig.2 System Configuration Diagram – showing the FX629, which with the indicated interfacing, will conform to the Mil-Std-188-113 Specification Component Unit Value Selectable 2 C 33p 1 C 33p ...

Page 5

Codec Timing Information ENCODER TIMING ENCODER CLOCK DATA CLOCKED ENCODER DATA OUTPUT t PCO DECODER TIMING DECODER CLOCK DECODER DATA INPUT MULTIPLEXING FUNCTION ENCODER HIGH Z OUTPUT t DR DATA ENABLE TIMING t Clock '1' Pulse Width CH 1.0 s ...

Page 6

Typical Codec Performance ...... 0dBm0 Input Level = 489mVrms - 2 Input Frequency = 800Hz Ref Level: -15dBm0 = 87mVrms - 3 ref Input Level (dBm0) Fig.5 Gain ...

Page 7

Typical Codec Performance ...... Input Level = -15dBm0 Input Frequency (kHz) Fig.10 S/N vs Input Frequency (16kbit/ 6dB/octave - 100 Frequency (Hz) ...

Page 8

... Supply voltage Input voltage at any pin (ref V SS Source/sink current (supply pins) (other pins) Total device dissipation @ 25 C Derating Operating temperature range: FX629J Storage temperature range: Operating Limits All characteristics are measured using the following parameters unless otherwise specified 5.0V Xtal/Clock f ...

Page 9

... Specifications ...... Process Information The following Table gives details of the process and test controls employed in the manufacture of the FX629 'Mil Std' Delta Codec. Function Hermeticity Fine Leak Test – Coarse Leak Test – Burnin Temperature Cycling The following mechanical assembly tests are Qualified to BS9450 ...

Page 10

... CML does not assume any responsibility for the use of any circuitry described. No circuit patent licences are implied and CML reserves the right at any time without notice to change the said circuitry. Handling Precautions The FX629 is a CMOS LSI circuit which includes input protection. However precautions should be taken to prevent static discharges which may cause damage. ...

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