MBM29LV002TC Fujitsu Microelectronics, Inc., MBM29LV002TC Datasheet - Page 14
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MBM29LV002TC
Manufacturer Part Number
MBM29LV002TC
Description
2m 256k X 8 Bit
Manufacturer
Fujitsu Microelectronics, Inc.
Datasheet
1.MBM29LV002TC.pdf
(52 pages)
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14
MBM29LV002TC
Notes: 1. Address bits A
Read/Reset
Read/Reset
Autoselect
Program
Chip Erase
Sector Erase
Sector Erase Suspend
Sector Erase Resume
Command
Sequence
2. Bus operations are defined in Table 2.
3. RA = Address of the memory location to be read
4. RD = Data read from location RA during read operation.
5. Both Read/Reset commands are functionally equivalent, resetting the device to the read mode.
Sector Address (SA)
PA = Address of the memory location to be programmed
SA = Address of the sector to be erased. The combination of A
PD = Data to be programmed at location PA. Data is latched on the falling edge of write pulse.
Addresses are latched on the falling edge of the write pulse.
uniquely select any sector.
Cycles
Req’d
Write
Bus
1
3
3
4
6
6
Table 6
11
Erase can be suspended during sector erase with Addr. (“H” or “L”). Data (B0H)
Erase can be resumed after suspend with Addr. (“H” or “L”). Data (30H)
XXXH F0H
Write Cycle
Addr. Data Addr. Data Addr. Data Addr. Data Addr. Data Addr. Data
555H AAH 2AAH
555H AAH 2AAH
555H AAH 2AAH
555H AAH 2AAH
555H AAH 2AAH
to A
First Bus
17
MBM29LV002TC/002BC Standard Command Definitions
= X = “H” or “L” for all address commands except or Program Address (PA) and
-70/-90/-12
Second Bus
Write Cycle
—
/MBM29LV002BC
55H
55H
55H
55H
55H
—
Write Cycle
555H
555H
555H A0H
555H
555H
Third Bus
—
F0H
90H
80H
80H
—
Fourth Bus
Read/Write
555H AAH 2AAH 55H
555H AAH 2AAH 55H
RA
PA
—
—
Cycle
17
, A
16
RD
PD
—
—
, A
15
-70/-90/-12
, A
Write Cycle
Fifth Bus
—
—
—
—
14
, and A
—
—
—
—
13
will
Write Cycle
555H
Sixth Bus
SA
—
—
—
—
10H
30H
—
—
—
—
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