MBM29DL800TA-70 Meet Spansion Inc., MBM29DL800TA-70 Datasheet - Page 20

• Manufacturer Part Number: MBM29DL800TA-70
• Description: Flash Memory Cmos 8m 1m ? 8 / 512k ? 16 Bit
• Manufacturer: Meet Spansion Inc.

20
MB M29DL800TA
■ COMMAND DEFINITIONS
Read/Reset Command
Autoselect Command
Device operations are selected by writing specific address and data sequences into the command register.
Writing incorrect address and data values or writing them in the improper sequence will reset the devices to the
read mode. Some commands are required Bank Address (BA) input. When command sequences are inputed
to bank being read, the commands have priority than reading. “MBM29DL800TA/BA Command Definitions Table”
in ■DEVICE BUS OPERATION defines the valid register command sequences. Note that the Erase Suspend
(B0h) and Erase Resume (30h) commands are valid only while the Sector Erase operation is in progress.
Moreover both Read/Reset commands are functionally equivalent, resetting the device to the read mode. Please
note that commands are always written at DQ
In order to return from Autoselect mode or Exceeded Timing Limits (DQ
Reset operation is initiated by writing the Read/Reset command sequence into the command register.
Microprocessor read cycles retrieve array data from the memory. The devices remain enabled for reads until the
command register contents are altered.
The devices will automatically power-up in the Read/Reset state. In this case, a command sequence is not
required to read data. Standard microprocessor read cycles will retrieve array data. This default value ensures
that no spurious alteration of the memory content occurs during the power transition. Refer to the AC Read
Characteristics and Waveforms for the specific timing parameters.
Flash memories are intended for use in applications where the local CPU alters memory contents. As such,
manufacture and device codes must be accessible while the devices reside in the target system. PROM
programmers typically access the signature codes by raising A
voltage onto the address lines is not generally desired system design practice.
The device contains an Autoselect command operation to supplement traditional PROM programming
methodology. The operation is initiated by writing the Autoselect command sequence into the command register.
The Autoselect command sequence is initiated by first writing two unlock cycles. This is followed by a third write
cycle that contains the bank address (BA) and the Autoselect command. Then the manufacture and device
codes can be read from the bank, and an actual data of memory cell can be read from the another bank.
Following the command write, a read cycle from address (BA)00h retrieves the manufacture code of 04h. A read
cycle from address (BA)01h for ×16((BA)02h for ×8) returns the device code (MBM29DL800TA = 4Ah and
MBM29DL800BA = CBh for ×8 mode; MBM29DL800TA = 224Ah and MBM29DL800BA = 22CBh for ×16 mode).
(See “MBM29DL800TA/BA Sector Protection Verify Autoselect Codes Table” and “Extended Autoselect Code
Table” in ■DEVICE BUS OPERATION.)
All manufacturer and device codes will exhibit odd parity with DQ
or unprotection) will be informed by address (BA)02h for ×16 ((BA)04h for ×8). Scanning the sector addresses
(A
for a protected sector. The programming verification should be performed by verify sector protection on the
protected sector. (See “MBM29DL800TA/BA User Bus Operations Tables (BYTE = V
■DEVICE BUS OPERATION.)
The manufacture and device codes can be allowed reading from selected bank. To read the manufacture and
device codes and sector protection status from non-selected bank, it is necessary to write Read/Reset command
sequence into the register and then Autoselect command should be written into the bank to be read.
If the software (program code) for Autoselect command is stored into the Frash memory, the device and
manufacture codes should be read from the other bank where is not contain the software.
18
, A
17
, A
16
, A
15
, A
14
, A
13
, and A
-70/90
12
) while (A
Retired Product DS05-20860-7E_August 6, 2007
/MBM29DL800BA
6
, A
0
1
to DQ
, A
0
) = (0, 1, 0) will produce a logical “1” at device output DQ
7
and DQ
7
8
9
defined as the parity bit. Sector state (protection
to DQ
to a high voltage. However, multiplexing high
15
5
bits are ignored.
= 1) to Read/Reset mode, the Read/
-70/90
IH
and BYTE = V
IL
)” in
0