MTV003 ETC-unknow, MTV003 Datasheet - Page 6

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MTV003

Manufacturer Part Number
MTV003
Description
Microprocessor Compatible Monitor Controller
Manufacturer
ETC-unknow
Datasheet

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Part Number
Manufacturer
Quantity
Price
Part Number:
MTV003N
Quantity:
201
* The above x may represent any data.
- Command Descriptions
Reg0 (write)
Reg0 (read)
Reg1 (read)
Reg1 (write)
Reg4
Reg5
Reg6
Reg7
Reg8
Reg9
Reg10
Reg11
Reg12
Reg13
Reg14
Reg15
Reg16
Reg17
Reg18
Reg25
Reg26
Reg27
Reg28
Reg29
Reg30
Reg31
I
00100
00101
00110
00111
01000
01001
01010
01011
01100
01101
01110
01111
10000
10001
10010
11001
11010
11011
11100
11101
11110
11111
I
: Begins the H-Freq count. To read the value in the H-Freq registers, the write command (Reg0)
needs to be issued first.
: The status of polarity, presence and static level for HS and VS.
: Hfreq Count Finish flags, Hfreq high bit.
: Selects the source of VBLANK and controls the polarity status of H pol, V pol
1. H pol , V pol
2. HS pre , VS pre , HVpre
3. H sl , V sl
* HVpre represents the status of the composite (H/V) presence in HS. H sl or V sl is valid only
1. HCFF
2. HF10 - HF8
and SYNC output polarity.
1. HV cvs
2. HB pl = 1 -> negative HBLANK output,
3. VB pl = 1 -> negative VBLANK output,
* After power-on, HB pl and VB pl shall be initialized to 0.
4. H pf1 , H pf0 = 0,0 or 1,1
5. V pf1 , V pf0
when HS pre or VS pre is not present.
MYSON
TECHNOLOGY
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
DA0 b0
DA1 b0
DA2 b0
XA0 b0
XA1 b0
XA2 b0
XA3 b0
XA4 b0
= 0,1
= 1,0
= 0,0 or 1,1
HBW0
VBW0
HBD0
STF
x
DA0 b1
DA1 b1
DA2 b1
XA0 b1
XA1 b1
XA2 b1
XA3 b1
XA4 b1
HBW1
VBW1
HBD1
RT0
x
= 1 -> positive,
= 1 -> present,
= 1 -> high,
= 1 -> valid,
= 3 high bit of Hfreq.
= 1 -> VBLANK is extracted from HS.
= 0 -> VBLANK is extracted from VS.
-> H pol
-> force H pol
-> force H pol
-> V pol
DA0 b2
DA1 b2
DA2 b2
XA0 b2
XA1 b2
XA2 b2
XA3 b2
XA4 b2
HBW2
VBW2
HBD2
RT1
6/13
x
DA0 b3
DA1 b3
DA2 b3
HBW3
ST bsh
XA0 b3
XA1 b3
XA2 b3
XA3 b3
XA4 b3
VBW3
HBD3
x
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
= 0 -> positive HBLANK output.
= 0 -> positive VBLANK output.
= x, by auto detection.
= 1.
= 0.
= x, by auto detection.
DA0 b4
DA1 b4
DA2 b4
HBW4
XA0 b4
XA1 b4
XA2 b4
XA3 b4
XA4 b4
VBW4
HBD4
S elft
x
= 0 -> negative.
= 0 -> not present.
= 0 -> low.
= 0 -> not valid.
DA0 b5
DA1 b5
DA2 b5
HBW5
XA0 b5
XA1 b5
XA2 b5
XA3 b5
XA4 b5
VBW5
HBD5
x
x
MTV003 Revision 2.3 07/01/1998
DA0 b6
DA1 b6
DA2 b6
HBW6
XA0 b6
XA1 b6
XA2 b6
XA3 b6
XA4 b5
HBD6
MTV003N
(MTV003)
x
x
x
DA0 b7
DA1 b7
DA2 b7
HBW7
XA0 b7
XA1 b7
XA2 b7
XA3 b7
XA4 b7
VBW7
HBD7
x
x

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