NP3665 Applied Micro Circuits Corporation (AMCC), NP3665 Datasheet - Page 2
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NP3665
Manufacturer Part Number
NP3665
Description
Oc-24 / 2ge Packet Processor For Mobile Infrastructure
Manufacturer
Applied Micro Circuits Corporation (AMCC)
Datasheet
1.NP3665.pdf
(4 pages)
nP3665
nP3665 Highlights
Interfaces
• Flexible combination of cell and packet
• Combined with Amur/Tigris devices,
• External Memory Interfaces:
1xSPI-3 + 1xGE + 1xUTOPIA-L2
Line Interfaces:
– OIF SPI-3 (8/32-bit modes)
– ATM Forum UTOPIA-2,16-bit, 50 MHz
– Up to two GE ports with integrated
supports deeply Channelized HDLC/ATM
applications up to 622 Mbps aggregate
bandwidth: T3/E3, T1/E1, nxDS0, and so
on
– ECC supported on all external
– Shared Payload and Context
MAC
memories
memories in RLDRAM-II bank (1x36,
2x18, 4x9 configurations) operating at
up to 300 MHz
1xSPI-3 + 2xGE
or
• External Search Interface
• CPU Interfaces: PowerPC and Fast
• Debug port
• JTAG port
High Performance nPcore
• One nPcore at up to 700 MHz
• 30% relative performance increase com-
Interfaces
– Shared ingress CSM/Flow database in
– Compliant with NPF
– Backward compatibility mode with
Ethernet
pared to nP3700 (Instruction/packet)
Engine
Policy
(CSM)
nP3665 Block Architecture
MACs
Line
QDR SRAM memory bank (1x18 or 2x9
configurations) operating at up to
250 MHz
existing TCAMs
GE
16
HOST CPU
Statistics
SPU
nPcore @ 700 MHz
nPcore @ 700 MHz
Engine
Packet Transform
24 Tasks
24 Tasks
Memory Access Unit
Engine
(PTE)
XSC
RLDRAM-II
36
DEBUG
Engine
Hash
Typical Power Dissipation
• @400 MHz: 3.6 W
• @550 MHz: 3.9 W
• @700 MHz: 4.2 W
Integrated Coprocessors
• Policy Engine for efficient packet
• Special Purpose Unit (SPU) for per-flow
• Hashing Unit
• On-Chip Debugger (OCD)
Integrated Traffic Manager
• Hierarchical Traffic Manager with
• Leverages field-proven nPX5710 and
1. See the nP3665 Application Note — Power and Board Space Require-
ments (nP 2006-0030) for more information.
classification
policing
fine-grained flow-based traffic
management
nPX5720 technology
Soft TM
Manager
Scheduling
Traffic
Queuing
Scratch
QAB
Pad
1
18