APD-240G064 Vishay, APD-240G064 Datasheet - Page 2

• Manufacturer Part Number: APD-240G064
• Description: Plasma Panel Display Modules, 240 X 64 Graphics Display With Ascii Input Controller, Dc/dc Converter And Drive Circuitry
• Manufacturer: Vishay

*Note: The maximum VDC draw denotes a power up condition
*Unit may be powered from + 5V to + 24V. Contact factory for
POWER UP CONDITION
Immediately upon power up the following is set:
The module is in the text mode.
The screen will have a message printed as follows:
This message indicates the hardware test has passed
successfully. The "mm-dd-yy" indicates the date the firm-
ware was released.
APD-240G064
Vishay Dale
www.vishay.com
42
when the DC converter starts. Typical duration is 15-30 mS.
current draw at voltages other than + 12V and pin connection J2.
VDC
POWER SUPPLY: (Recommended)
PARALLEL INTERFACE
INPUT/OUTPUT TIMING DIAGRAM, J2
LOGIC LEVEL: L = 0.0 V minimum to 0.8 V maximum.
BU
L
X
X
PIN
1, 3, 5, 7, 9, 11, 13, 15
17
21
6, 8, 12, 14, 16, 18, 20, 22
23
19
25
4
24
2, 26
10
DP
X
H
X
RAM OK
WR
_|¯¯
H
X
+ 12V ± 0.6V
H = 2.2 V minimum to 5.0 V maximum..
X = Don't care.
mm-dd-yy
RD
H
X
L
US
H
L
L
ROM OK
FUNCTION
Write character or control code.
Read data from display while low.
Input/Output inhibited.
FUNCTION
D0-D7 (Data Bus)
(input/output)
WRITE (WR)
(input)
READ (RD)
(input)
N/C
RESET
(input)
US (Unit Select)
(input)
BLANK (BL)
(input)
BRIGHT/DIM (input)
(BUSY (BU)
(output)
GROUND
DATA PRESENT
(DP) (output)
2.5A Max.*, 1.25 A Typ
.
Mates to Tyco AMP *1-480424-0 housing (1 rqr.)
Power up RESET cycle on display module takes approxi-
mately
250 mS to complete. It is suggested the user wait for that
time period to elapse before entering data.
Note: Input load is one 74 HCT type input with 4.7k to V
PARALLEL INTERFACE
J2, PARALLEL DATA CONNECTOR.
Mates with 3M Tyco AMP 746285-6, 26 pin, IDC connector.
Note: PAR should be jumper selected on jumper block W1 for
proper parallel interface operation.
Once data write is complete, BUSY signal is output. BUSY
signal = "1" during data disposition and while the
communication buffer is full.
DATA WRITE: When WR changes from "0" to "1" while
US = "0" and RD = "1", data is latched.
DATA READ: When RD = "0" while US = "0". WR = "1", and
DP = "1", data may be read by the host.
CONNECTOR
J1
POWER SUPPLY CONNECTION
DESCRIPTION
Data written to and read from the display unit through an 8 bit
bi-directional data bus.
Write data on low to high transmit.
Read data while low.
Not connected.
Reset display to power-up condition when low, operate while high.
Read and Write commands only influence display while US is low.
Blank display while BL is low but maintain cursor and data.
Display at full brightness when high or half brightness when low.
When BUSY is high, no further data or commands should be given.
Common to both power supply input and host data interface
Data is ready to be read when the DATA PRESENT signal is high.
are 74 HC type.
*350689-1 socket pins (4 rqr.)
PIN
1
2
3
4
Document Number: 37046
Revision 21-Dec-00
SIGNAL
+ 12 V
GROUND
GROUND
Reserved
cc
.
. Outputs