ASM811 ETC-unknow, ASM811 Datasheet - Page 3

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ASM811

Manufacturer Part Number
ASM811
Description
Low Power Cpu Supervisor
Manufacturer
ETC-unknow
Datasheet

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October 2003
rev 1.0
Reset Output Operation
In µP / µC systems it is important to have the processor and
the system begin operation from a known state. A reset
output to a processor is provided to prevent improper
operation during power supply sequencing or low voltage
brown-out conditions.
The ASM811/812 are designed to monitor the system power
supply voltages and issue a reset signal when the levels are
out of range. RESET outputs are guaranteed to be active for
V
internal timer keeps RESET active for the reset timeout
period, after which RESET becomes inactive (HIGH for the
ASM811 and LOW for the ASM812). If V
reset threshold, RESET automatically becomes active.
Alternatively, external circuitry or an operator can initiate this
condition using the Manual Reset (MR) pin. MR can be left
open if it is not used. MR can be driven by TTL/CMOS logic
or even an external switch.
Valid Reset with V
To ensure logic inputs connected to the ASM811 RESET pin
are in a known state when V
down resistor at RESET is needed. The value is not critical.
A 100kΩ pull-up resistor to V
Figure 1: Reset Timing and Manual Reset (MR)
CC
RESET
RESET
MR
V
above 1.1V. When V
CC
5V
0V
5V
0V
5V
0V
5V
0V
CC
T
MRST
under 1.1V
CC
CC
exceeds the reset threshold, an
CC
is needed with the ASM812.
is under 1.1V, a 100kΩ pull-
Notice: The information in this document is subject to change without notice
4 Pin µP Voltage Supervisor with Manual Reset
V
TH
CC
T
drops below the
RST
ASM811
ASM812
Power Supply
Power supply
Application Information
Negative VCC Transients
Typically short duration transients of 100mV amplitude and
20µs duration do not cause a false RESET. A 0.1µF capacitor
at V
Bidirectional Reset Pin Interfacing
The ASM811/812 can interface with µP / µC bi-directional
reset pins by connecting a 4.7kΩ resistor in series with the
ASM811/812 reset output and the µP/µC bi-directional reset
input pin.
CC
Figure 4: Bi-directional Reset Pin Interface
Figures 2 & 3: RESET valid with V
increses transient immunity.
MR
V
GND
ASM811
CC
RESET
MR
ASM811
V
GND
CC
RESET
100kΩ
ASM811, ASM812
Bi-directional I/O Pin
Power Supply
4.7kΩ
CC
MR
under 1.1V
RESET
Input
BUF
V
GND
ASM812
CC
RESET
µC or µP
GND
3 of 10
Buffered
RESET
100kΩ

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