AD5201 Analog Devices, Inc., AD5201 Datasheet - Page 3

• Manufacturer Part Number: AD5201
• Description: 256-position And 33-position Digital Potentiometers
• Manufacturer: Analog Devices, Inc.

AD5201 ELECTRICAL CHARACTERISTICS
Parameter
DC CHARACTERISTICS RHEOSTAT MODE
DC CHARACTERISTICS POTENTIOMETER DIVIDER MODE (Specifications apply to all VRs.)
RESISTOR TERMINALS
DIGITAL INPUTS AND OUTPUTS
POWER SUPPLIES
DYNAMIC CHARACTERISTICS
NOTES
10
Specifications subject to change without notice.
1
2
3
4
5
6
7
8
9
Typicals represent average readings at 25°C and V
Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper posi-
tions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic. I
V
V
Six bits are needed for 33 positions even though it is not a 64-position device.
INL and DNL are measured at V
specification limits of ± 1 LSB maximum are Guaranteed Monotonic operating conditions.
Resistor Terminals A, B, W have no limitations on polarity with respect to each other.
Guaranteed by design and not subject to production test.
Measured at the A terminal. A terminal is open-circuited in shutdown mode.
P
All dynamic characteristics use V
Resistor Differential Nonlinearity
Resistor Integral Nonlinearity
Nominal Resistor Tolerance
Resistance Temperature Coefficient
Wiper Resistance
Resolution
Differential Nonlinearity
Integral Nonlinearity
Voltage Divider Temperature Coefficient
Full-Scale Error
Zero-Scale Error
Voltage Range
Capacitance
Capacitance
Shutdown Supply Current
Common-Mode Leakage
Input Logic High
Input Logic Low
Input Logic High
Input Logic Low
Input Current
Input Capacitance
Logic Supply
Power Single-Supply Range
Power Dual-Supply Range
Positive Supply Current
Negative Supply Current
Power Dissipation
Power Supply Sensitivity
Bandwidth –3 dB
Total Harmonic Distortion
V
Resistor Noise Voltage Density
DISS
SS
AB
W
= –2.7 V.
= V
Settling Time (10 kΩ/50 kΩ)
is calculated from (I
DD
, Wiper (V
4
7
7
W
A, B
6
W
9
7
) = No connect.
5
DD
× V
5
8
DD
DD
3
W
2
). CMOS logic level inputs result in minimum power dissipation.
with the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. V
= 5 V, V
2
7, 10
SS
= 0 V.
DD
Symbol
R-DNL
R-INL
∆R
R
R
N
DNL
INL
∆V
V
V
V
C
C
I
I
V
V
V
V
I
C
V
V
V
I
I
P
PSS
BW_10 kΩ
BW_50 kΩ
THD
t
e
DD_SD
CM
IL
DD
SS
S
N_WB
= 5 V, V
DISS
AB
W
WFSE
WZSE
A, B, W
IH
IL
IH
IL
LOGIC
DD RANGE
DD/SS RANGE
A, B
W
IL
AB
W
/∆T
/∆T
W
SS
= 0 V.
Conditions
R
R
T
V
V
Code = 10
Code = 20
Code = 00
f = 1 MHz, Measured to GND, Code = 10
f = 1 MHz, Measured to GND, Code = 10
V
V
V
V
V
V
V
V
V
∆V
R
R
V
V
R
WB
WB
AB
DD
DD
A
DD
DD
IN
SS
IH
SS
IH
AB
AB
A
A
WB
A
DD
= 25°C
= V
= 1 V rms, V
= 5 V, V
= 0 V
= +5 V or V
= –5 V
, V
, V
= V
= 0 V or 5 V
= +5 V or V
= 10 kΩ, Code = 10
= 50 kΩ, Code = 10
= 5 V
= 5.5 V
= 3 V, V
= 3 V, V
= 5 kΩ, RS = 0
(V
–40 C < T
= +5 V ± 10%
A
A
B
DD
DD
= No Connect
= No Connect
= V
= 5 V
, Wiper = No Connect
H
H
H
B
DD
SS
SS
= 0 V, ± 1 LSB Error Band
/2
A
= 0 V
= 0 V
IL
B
IL
< +85 C unless otherwise noted.)
= 0 V, f = 1 kHz, R
= 0 V
= 0 V, V
10%, or 3 V
H
H
DD
= +5 V, V
10%, V
AB
= 10 kΩ
SS
SS
= –5 V
H
H
= 0 V, V
W
A
= V
Min Typ
–1
–30
6
–0.5 ± 0.01 +0.5
–1
–1/2 –1/4
0
V
2.4
2.1
2.7
–0.3
± 2.3
–0.01 0.001 +0.01 %/%
–0.5 ± 0.05 +0.5
= +V
SS
DD
AD5200/AD5201
A
/R for both V
= V
DD
± 0.1
500
50
± 0.02 +1
5
+1/4
45
60
0.01
1
5
15
15
600
100
0.003
2/9
9
, V
DD
B
1
and V
= 0 V,
Max
+1
+30
100
0
+1/2
V
5
0.8
0.6
± 1
5.5
5.5
± 2.7
40
40
0.2
DD
B
DD
= 0 V. DNL
= +2.7 V,
Unit
LSB
LSB
%
ppm/°C
Ω
Bits
LSB
LSB
ppm/°C
LSB
LSB
V
pF
pF
µA
nA
V
V
V
V
µA
pF
V
V
V
µA
µA
mW
kHz
kHz
%
µs
nV√Hz