FD7745T Pletronics, Inc., FD7745T Datasheet - Page 6

• Manufacturer Part Number: FD7745T
• Description: Fd7t Series Multi-output Cmos Clock Oscillator
• Manufacturer: Pletronics, Inc.

Output Buffers
Control Inputs
Specifying The FD7T Device For A Specific Application
S2
Each output buffer can have 3 modes of operation:
The output buffers for Out2 and Out3 and the output buffers Out6 and Out7 function as pairs. When
selecting on the function both outputs in the pair function the same.
There can be two options stored for the Output Buffers, State 0 and State 1. The eight Sx input settings
can have assigned one of the two Output Buffer states for each of Output Buffer sets.
This permits wired ‘OR’ of tri-state outputs, this permits setting total enable and disable functions of all
outputs.
The three inputs, S0, S1/SDA and S2/SCL can be configured in two ways.
The S0, S1 and S2 input signals control and variations states allowed:
0
0
0
0
1
1
1
1
The MUX inputs are fixed independent of the Sx setting.
The Divider Values are fixed independent of the Sx setting
Pletronics provides an EXCEL spreadsheet based program that assists in defining the FD77T functions.
The program only permits setting of parameters that will properly function. After defining the desired
functions, this spreadsheet is sent to Pletronics and the Configuration Part Number will then be
assigned. Pletronics uses the values in the spreadsheet to program the devices for shipment.
1)
2)
Inputs
S1
www.pletronics.com
0
0
1
1
0
0
1
1
1) Tri State
Used as 3 user inputs to permit up to 8 states, Sx input setting.
S0 used as an input to permit up to 2 states, S0 input setting. The SDA and SCL become clock
and data inputs to write to the FD7T internal setting memory. The interface follows the I
protocol. If the SDA and SCL are not set then the internal eePROM sets the operation.
S0
0
1
0
1
0
1
0
1
SS
0/7
0/7
0/7
0/7
0/7
0/7
0/7
0/7
PLL #1
PLL
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
2) Active Low
SS
0/7
0/7
0/7
0/7
0/7
0/7
0/7
0/7
PLL #2
PLL
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
425-776-1880
0/7
0/7
0/7
0/7
0/7
0/7
0/7
0/7
SS
PLL #3
PLL
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
3) The signal output of the Multiplexer
FD7T Series Multi-Output
SS
0/7
0/7
0/7
0/7
0/7
0/7
0/7
0/7
PLL #4
CMOS Clock Oscillator
PLL
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
2
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
3
Output
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
May 2008
4
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
5
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
2
6
C
6
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
7