DS1556P Maxim Integrated Products, Inc., DS1556P Datasheet - Page 5

• Manufacturer Part Number: DS1556P
• Description: 1m, Nonvolatile, Y2k-compliant Timekeeping Ram
• Manufacturer: Maxim Integrated Products, Inc.

a typical application, the OE signal will be high during a write cycle. However, OE can be active
provided that care is taken with the data bus to avoid bus contention. If OE is low prior to WE
transitioning low, the data bus can become active with read data defined by the address inputs. A low
transition on WE will then disable the outputs t
DATA-RETENTION MODE
The 5V device is fully accessible and data can be written and read only when V
However, when V
internal clock registers and SRAM are blocked from any access. When V
point V
battery. RTC operation and SRAM data are maintained from the battery until V
levels.
The 3.3V device is fully accessible and data can be written and read only when V
hen V
switched from V
than V
below V
nominal levels.
All control, data, and address signals must be powered down when V
BATTERY LONGEVITY
The DS1556 has a lithium power source that is designed to provide energy for the clock activity, and
clock and RAM data retention when the V
supply is sufficient to power the DS1556 continuously for the life of the equipment in which it is
installed. For specification purposes, the life expectancy is 10 years at 25°C with the internal clock
oscillator running in the absence of V
lithium energy source disconnected, guaranteeing full energy capacity. When V
level greater than V
expectancy of the DS1556 will be much longer than 10 years since no internal battery energy is
consumed when V
INTERNAL BATTERY MONITOR
The DS1556 constantly monitors the battery voltage of the internal battery. The Battery Low Flag (BLF)
bit of the Flags Register (B4 of 1FFF0h) is not writable and should always be a 0 when read. If a 1 is ever
present, an exhausted lithium energy source is indicated and both the contents of the RTC and RAM are
questionable.
POWER-ON RESET
A temperature compensated comparator circuit monitors the level of V
fail trip point, the RST signal (open drain) is pulled low. When V
signal continues to be pulled low for a period of 40 ms to 200 ms. The power-on reset function is
independent of the RTC oscillator and thus is operational whether or not the oscillator is enabled.
CC
SO
SO
, the device power is switched from V
SO
falls below V
(battery supply level), device power is switched from the V
. RTC operation and SRAM data are maintained from the battery until V
CC
CC
CC
to the internal backup lithium battery when V
PF
is present.
is below the power-fail point V
, the lithium energy source is enabled for battery backup operation. Actual life
PF
, access to the device is inhibited. If V
CC
. Each DS1556 is shipped from Dallas Semiconductor with its
CC
supply is not present. The capability of this internal power
WEZ
CC
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DS1556 1M, Nonvolatile, Y2K-Compliant Timekeeping RAM
to the internal backup lithium battery when V
after WE goes active.
PF
(point at which write protection occurs) the
PF
CC
CC
is less than V
CC
CC
drops below V
returns to nominal levels, the RST
is powered down.
pin to the internal backup lithium
CC
CC
. When V
falls below the battery switch
CC
SO
CC
CC
CC
is returned to nominal
, the device power is
CC
PF
is first applied at a
is greater than V
is greater than V
. If V
falls to the power
CC
is returned to
PF
is greater
CC
drops
PF
PF
.
.