MP7612 Exar Corporation, MP7612 Datasheet

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MP7612

Manufacturer Part Number
MP7612
Description
Octal 12-bit Dac Array D/a Converter With Output Amplifier And Serial Data/address Up Control Logic
Manufacturer
Exar Corporation
Datasheet

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FEATURES
GENERAL DESCRIPTION
Digital-to-Analog Converters with voltage output amplifiers and
a 3-wire standard serial digital address and data port.
all codes. Accuracy of +0.75 LSB for DNL and +1 LSB for INL is
also achieved for B grades. The output amplifier is capable of
SIMPLIFIED BLOCK DIAGRAM
Eight Independent 12-Bit DACs with Output Amplifiers
Low Power 320 mW (typ.)
Serial Digital Data and Address Port (3-Wire
Standard)
12-Bit Resolution, 11 Bit Accuracy
Extremely Well Matched DACs
Extremely Low Analog Ground Current (<60 A/Channel)
+10 V Output Swing with +11.4 V Supplies
Zero Volt Output Preset (Data = 10 .. 00)
Rugged Construction – Latch-Up Free
Parallel Version: MP7613
The MP7612 provides eight independent 12-bit resolution
Typical DAC matching for B grade versions is 0.7 LSB across
Rev. 3.00
E1996
RST
CLK
SDI
LD
EXAR Corporation, 48720 Kato Road, Fremont, CA 94538 z (510) 668-7000 z FAX (510) 668-7010
D
D
LAT
LAT
EN
EN
V
Q
Q
RP
V
EE
12
D0 to D11
16-Bit Shift Register
...the analog plus company
V
EE
+
Not Used
LD
V
XE0 - XE7
4 to 16 Decoder
CC
8
A0 to A3
4
V
CC
V
8
RN
AGND
AGND V
TM
sinking and sourcing 5mA, and the output voltage settles to
12-bits in less than 30 s (typ.).
and board space.
rugged solutions that are latch-up free, and take advantage of
EXAR’s patented thin-film resistor process which exhibits excel-
lent long term stability and reliability.
-processor logic interface to reduce pin count, package size,
The MP7612 is equipped with a serial data (3-wire standard)
Built using an advanced linear BiCMOS, these devices offer
XR XE
XR XE
D
D
LAT0
LAT7
D/A Converter with Output Amplifier
V
XE0
XE7
RP
REF
Q
Q
12
12
APPLICATIONS
DGND DV
Data Acquisition Systems
ATE
Process Control
Self-Diagnostic Systems
Logic Analyzers
Digital Storage Scopes
PC Based Controller/DAS
DAC0
DAC7
V
V
V
V
Octal 12-Bit DAC Array
RN
RP
RN
RP
DD
and Serial Data/Address
Tri-State Buffer
+
+
P Control Logic
LD
MP7612
April 1996-4
VO0
VO7
SDO
TM

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MP7612 Summary of contents

Page 1

... APPLICATIONS sinking and sourcing 5mA, and the output voltage settles to 12-bits in less than 30 s (typ.). The MP7612 is equipped with a serial data (3-wire standard) -processor logic interface to reduce pin count, package size, and board space. Built using an advanced linear BiCMOS, these devices offer rugged solutions that are latch-up free, and take advantage of EXAR’ ...

Page 2

... SOIC –40 to +85 C SOIC PIN CONFIGURATIONS 1 See the following page for pin descriptions 44 Pin PLCC Rev. 3.00 Res. INL Part No. (Bits) (LSB) MP7612BP MP7612AP 12 MP7612BS MP7612AS AGND VO0 2 27 VO1 3 26 VO2 4 25 VO3 ...

Page 3

... Reset all DACs Output N/C No Connection LD Load Signal; Load Data to Selected DAC CLK Serial Data Clock SDI Serial Data Input SDO Shift Register Serial Output N/C No Connection DGND Digital Ground DV Digital Positive Power Supply (+ N/C No Connection N/C No Connection DGND Digital Ground 3 MP7612 ...

Page 4

... MP7612 ELECTRICAL CHARACTERISTICS – REF Parameter Symbol STATIC PERFORMANCE Resolution (All Grades) N Integral Non-Linearity INL (Relative Accuracy Differential Non-Linearity DNL A B Positive Full Scale Error +FSE A B Negative Full Scale Error –FSE A B Bipolar Zero Offset ...

Page 5

... MP7612 Units Test Conditions/Comments +FS to AGND mA + –FS to AGND mA – Bipolar zero mA Bipolar zero mA Bipolar zero mW Bipolar zero ...

Page 6

... MP7612 ELECTRICAL CHARACTERISTICS (CONT’D) NOTES: 1 Guaranteed; not tested. 2 Specified values guarantee functionality. 3 Digital inputs should not go below digital GND or exceed DV 4 See Figures 2 and 3 . All digital input signals are specified with t 5 For power supply values < 2V , the output swing is limited as specified in Analog Outputs. ...

Page 7

... Rev. 3.00 MSB A0 D11 D10 D9 D8 Previous Data Figure 1. Serial Data Timing and Loading HZ1 CKLD2 t PR +1/2 LSB Error Band SD Figure 3. Reset Operation 7 MP7612 DAC Register Loaded A3 (1) t HZ2 HIGH LDCK LDSU t CKLD1 +1/2 LSB Band ...

Page 8

... If the LD signal is high, the CLK signal loads the digital input bits (SDI) into the shift register (4 bits ad- dress plus 12 bits data DB11 to DB0 for the MP7612). The LD signal going low loads the data into the selected DAC. ...

Page 9

... SERIAL INTERFACE DIAGRAMS Rev. 3.00 Output Voltage = 2 Binary Code ( (– –10 000000000000 4094 10 (–1 + 011111111111 4096 10 (–1 + 100000000000 10 (–1 + 100000000001 10 (–1 + 111111111111 Table 2. MP7612 Ideal DAC Output vs. Input Code 9 MP7612 (– 4096 ) = –4.88 mV 4096 ) = 0 4096 4098 ) = 4.88 mV 4096 8190 ) = 9.99512 4096 ...

Page 10

... MP7612 PC Data LD CLK PC Data Out Data CLK 1 SDO 2 n Address (SDI) Data In CLK Rev. 3.00 VRI1 VOI1 VRI2 VOI2 IC(1) IC(2) SDI LD SDO SDI LD SDO Figure 4. Simplified Diagram VRI1 VOI1 VRI2 VOI2 VRIm IC(1) IC(2) SDI LD SDO SDI LD SDO ...

Page 11

... 74LS138 E3 Address Decoder CLK DB7 SDI RST From SYSTEM RESET Figure 7. MC6800 Interface Address Bus 74LS138 E3 Address Decoder E2 Data Bus LD CLK SDI RST From SYSTEM RESET Figure 8. 8085 Interface 11 MP7612 Address Bus 16 8 Data Bus ...

Page 12

... MP7612 PERFORMANCE CHARACTERISTICS – OUT 2.5mV 0 V –2.5mV V OUT Graph 1. Typical Output Settling Characteristic Graph 1 shows the typical output settling characteristic of the MP7610 Family for a RESET !ZS!FS!ZS series of code transitions. The top graph shows the output voltage transients, while the bottom graph shows the differ- ence between the output and the ideal output ...

Page 13

... Graph 3. DAC 0 INL vs. V Graph 5. DAC 0 Linearity with =  REF OUT Graph 7. DAC 0 Linearity with =  REF OUT Rev. 3.00 Graph 4. DAC 0 DNL vs. V REF Graph 6. DAC 0 Linearity with V REF Graph 8. DAC 0 Linearity with V REF 13 MP7612 REF =  OUT =  OUT ...

Page 14

... MP7612 MP7610 Family Figure 9. Circuit for Determining Typical Analog Output Pulse Response 2.0mA I 0.0 400mV V O –400mV 200mV C = 500pF L V OUT –200mV 0s 1.0 s Graph 9. Typical Response of the MP7610 Family Analog Output to a Current Pulse with CL=500pF, 5nF, 50nF, 500nF Rev. 3.00 V 50W V OUT ...

Page 15

... BSC 1.27 BSC 0.042 0.056 1.07 1.42 0.042 0.048 1.07 1.22 0.025 0.045 0.64 1.14 15 MP7612 Seating Plane ...

Page 16

... MP7612 28 1 Seating Plane e SYMBOL Note: The control dimension is the millimeter column Rev. 3.00 28 LEAD SMALL OUTLINE (350 MIL JEDEC SOIC INCHES MILLIMETERS MIN MAX MIN 0.093 0.104 2.35 0.004 0.012 0.10 0.013 0.020 0.33 0.009 ...

Page 17

... Rev. 3.00 Notes 17 MP7612 ...

Page 18

... MP7612 Rev. 3.00 Notes 18 ...

Page 19

... Rev. 3.00 Notes 19 MP7612 ...

Page 20

... MP7612 EXAR Corporation reserves the right to make changes to the products contained in this publication in order to im- prove design, performance or reliability. EXAR Corporation assumes no responsibility for the use of any circuits de- scribed herein, conveys no license under any patent or other right, and makes no representation that the circuits are free of patent infringement. Charts and schedules contained here in are only for illustration purposes and may vary depending upon a user’ ...

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